多重參考畫面提供可以提供較佳的影像品質及較低的編碼位元率，但高計算複雜度卻一直是及時處理所需面對的嚴峻考驗。本篇論文提出了一個符合H.264/AVC的視訊標準的多重參考畫面的快速演算法及硬體架構，可以由前一張參考畫面的移動向量，模式決策等資訊決定是否提前終止參考畫面的搜尋。相較於一般必須使用固定參考畫面的演算法，本篇論文根據影像的特性，可以在維持影像品質的前提下適應性的調整搜尋畫面的張數。模擬結果顯示，提出的演算法可以節省30%~78%的計算複雜度，但僅有0.02 dB的PSNR損失及位元率的小幅增加。在硬體設計上，我們採用適應性的技巧來決定是否載入需要的搜尋視窗，因此快取記憶體的大小僅為一般多重參考畫面的五分之一，並且可以降低和主記憶體間的頻寬需求。
依據上述演算法設計出其所對應的硬體架構，包含動作評估單元，模式決策單元，以及控制單元。模擬結果顯示整體架構需要128.8 k個邏輯閘，且最快的時脈速度可達到 185 MHz，故得知其在最差的情況下，可支援在 CIF (356 * 288) @30fps 解析度下即時的預測處理。

This thesis proposes an adaptive multi-frame algorithm and its VLSI architecture for H.264/AVC. Multiple reference frames can supply better video quality and less coding bit rates. The real-time process of multi-frame motion estimation is hard to be achieved for high computational complexity. The information of SAD trend, motion vector, and mode decision from the previous reference frames can be applied to decide for the early termination of the frame level search. The proposed algorithm adaptively modulates the number of reference frames according to the texture of the video sequences.
Simulation results represent that the proposed algorithm saves 30%~78% computational complexity only with a little PSNR degradation and bit rate increment. In the hardware architecture, the cache is loaded while necessary. This approach can save both system bandwidth and 80% of cache memory. The corresponding hardware architecture for the algorithm is proposed, including motion estimation, mode decision, and control units. Simulation results represent that the total number of gates for this architecture is 128.8 k and the maximum operation frequency is 185 MHz. This design conforms the real-time requirement for the CIF (356 * 288) @30fps video resolution.

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