| 研究生: |
蕭育書 Xiao, Yu-Shu |
|---|---|
| 論文名稱: |
使用電壓和頻率調整技術達到可管理溫度以及功率之系統的異質虛擬平台 A Heterogeneous Virtual Platform for Thermal and Power Manageable Systems Using Voltage and Frequency Scaling |
| 指導教授: |
邱瀝毅
Chiou, Lih-Yih |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2011 |
| 畢業學年度: | 99 |
| 語文別: | 英文 |
| 論文頁數: | 75 |
| 中文關鍵詞: | 異質虛擬平台 、動態溫度管理 、電壓和頻率調整技術 |
| 外文關鍵詞: | heterogeneous virtual platform, DTM, DVFS |
| 相關次數: | 點閱:95 下載:2 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
隨著製程進步,單一晶片已經可以包含數百萬顆電晶體,而單位面積下的功率消耗也隨之愈來越大,進而導致溫度大幅地上升。在設計探勘中,高階的虛擬平台被用來模擬晶片效能、功率和溫度的問題,並且驗證探勘後的成效。但光靠設計探勘並沒有辦法完全降低晶片在動態運作時產生的熱點(Hotspot),因此動態溫度管理(Dynamic Thermal Management)技術的應用漸漸的越趨普遍。而電壓和頻率調整技術是最常用於動態溫度管理的其中一種技術,因此如何在一個探勘後的虛擬平台中發展動態溫度管理演算,並且考慮到電壓和頻率調整技術所帶來的負面效應,這將會是一個問題的所在。
在論文中我們建置了一個用於驗證動態溫度管理演算法的異質虛擬平台,且是針對使用電壓和頻率調整技術的溫度管理演算法,其中整合了一個雙核心的數位系統模組以及直流電源轉換器(DC-DC)和鎖相迴路(PLL)等類比模組,如此一來便可清楚地顯現出電壓和頻率調整技術所帶來的負面影響。再來我們使用近幾年著名期刊所提出的演算法來當作我們虛擬平台的研究個案,而且設計了三個測試範例,搭配期刊中所提到的演算法,清楚地說明和驗證此平台的應用方向和正確性。
As technology advancement, millions of transistor could be integrated into single chip. Thus power density increases accordingly and subsequently led to the increase of chip temperatures. In design space exploration, virtual platforms are used to model the performance, power and thermal issues and verify the system design. However, it is not enough in dealing with thermal issues, especially hotspots, by design exploration alone due to the infrequent run-time thermal emergency. Thus, dynamic thermal management (DTM) technique is applied to tackle the hotspots. As voltage and frequency scaling is one of the most popular schemes for DTM. Therefore, it would be a problem to develop DTM algorithms on a virtual platform not able to consider the voltage and frequency transition overhead. In this thesis, we proposed a heterogeneous virtual platform for thermal and power management with the capability of using voltage and frequency scaling. The platform integrates a digital dual-core system model with the DC-DC and PLL analog models for clearly showing the voltage and frequency transition overhead. Several recent developed algorithms are used as case studies for verifying the proposed heterogeneous virtual platform.
[1] S. R. Corporation. (2005). Packing Thrust Strategic Needs. [Online]. Available: http://www.src.org/
[2] P. Lieverse, et al., "A methodology for architecture exploration of heterogeneous signal processing systems," in Proc. IEEE Workshop on Signal Processing Systems (SiPS), 1999, pp. 181-190.
[3] A. Bartolini, et al., "A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicores," in ACM Great lakes symposium on VLSI (GLSVLSI), Providence, Rhode Island, USA, 2010, pp. 311-316.
[4] OSCI. (2010). SystemC AMS extensions User's Guide. [Online]. Available: http://www.systemc.org/
[5] Intel. (2003). Mobile Intel Pentium 4 processor - M datasheet. [Online]. Available: http://www.intel.com
[6] A. Gupta, et al., "On chip Communication-Architecture Based Thermal Management for SoCs," in Proc. IEEE International Symposium on VLSI Design Automation and Test (VLSI-DAT), Hsinchu, Taiwan, 2009, pp. 76-79.
[7] J. S. Lee, et al., "Predictive Temperature-Aware DVFS," IEEE Trans. Computers, vol. 59, no. 1, pp. 127-133, Jan. 2010.
[8] P. Chaparro, et al., "Using MCD-DVS For Dynamic Thermal Management Performance Improvement," in IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM), 2006, pp. 140-146.
[9] J. Choi, et al., "Thermal-aware task scheduling at the system software level," in Proc. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2007, pp. 213-218.
[10] Y. Jun, et al., "Dynamic Thermal Management through Task Scheduling," in Proc. IEEE International Symposium on Performance Analysis of Systems and software (ISPASS), 2008, pp. 191-201.
[11] Y. Ge, et al., "Distributed task migration for thermal management in many-core systems," in Proc. ACM/IEEE Design Automation Conference (DAC), 2010, pp. 579-584.
[12] A. Kumar, et al., "HybDTM: a coordinated hardware-software approach for dynamic thermal management," in Proc. ACM/IEEE Design Automation Conference (DAC), 2006, pp. 548-553.
[13] J. Donald and M. Martonosi, "Techniques for Multicore Thermal Management: Classification and New Exploration," in Proc. ACM International Symposium on Computer Architecture (ISCA), 2006, pp. 78-88.
[14] K. SKADRON, et al., "Temperature-aware microarchitecture: Extended discussion and results," in Proc. ACM International Symposium on Computer Architecture (ISCA), 2003, pp. 2-13.
[15] K. Skadron, et al., "Temperature-aware microarchitecture: Modeling and implementation," ACM Trans. Architecture and Code Optimization, vol. 1, no. 1, pp. 94-125, Mar. 2004.
[16] T. Š. Rosing, "Energy and thermal management in MPSOCs," UCSanDiego., Dept. of Computer Science, System Energy Efficiency Lab., 2009.
[17] Y. Inchoon, et al., "Predictive dynamic thermal management for multicore systems," in Proc. ACM/IEEE Design Automation Conference (DAC), 2008, pp. 734-739.
[18] A. K. Coskun, et al., "Proactive temperature balancing for low cost thermal management in MPSoCs," in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2008, pp. 250-257.
[19] A. K. Coskun, et al., "Utilizing Predictors for Efficient Thermal Management in Multiprocessor SoCs," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems,, vol. 28, no. 10, pp. 1503-1516, Oct. 2009.
[20] A. K. Coskun, et al., "Proactive temperature management in MPSoCs," in Proc. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2008, pp. 165-170.
[21] R. Cochran and S. Reda, "Consistent runtime thermal prediction and control through workload phase detection," in Proc. ACM/IEEE Design Automation Conference (DAC), 2010, pp. 62-67.
[22] R. Z. Ayoub and T. S. Rosing, "Predict and act: dynamic thermal management for multi-core processors," in Proc. ACM/IEEE International symposium on Low power electronics and design (ISLPED), San Fancisco, CA, USA, 2009, pp. 99-104.
[23] F. Zanini, et al., "Multicore thermal management with model predictive control," in Proc. IEEE European Conference on Circuit Theory and Design (ECCTD), 2009, pp. 711-714.
[24] J. Srinivasan and S. V. A., "Predictive dynamic thermal management for multimedia applications," in Proc. ACM International conference on Supercomputing (ICS), San Francisco, CA, USA, 2003, pp. 109-120.
[25] O. Khan and S. Kundu, "Hardware/software co-design architecture for thermal management of chip multiprocessors," in Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE), 2009, pp. 952-957.
[26] T. Mitra and R. Jayaseelan, "Dynamic thermal management via architectural adaptation," in Proc. ACM/IEEE Design Automation Conference (DAC), 2009, pp. 484-489.
[27] T. Lothar, et al., "Thermal-Aware System Analysis and Software Synthesis for Embedded Multi-Processors," in Proc. ACM/IEEE Design Automation Conference (DAC), San Diego, California, USA, 2011.
[28] R. Rao and S. Vrudhula, "Fast and Accurate Prediction of the Steady-State Throughput of Multicore Processors Under Thermal Constraints," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1559-1572, Oct. 2009.
[29] T. D. Burd and R. W. Brodersen, "Design issues for Dynamic Voltage Scaling," in Proc. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Rapallo, Italy, 2000, pp. 9-14.
[30] P. Jaehyun, et al., "Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors," in Proc. ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), 2010, pp. 419-424.
[31] Y. Zhang, et al., "Energy minimization of real-time tasks on variable voltage processors with transition energy overhead," in Proc. ACM/IEEE Asia and South Pacific Design Automation Conference (ASPDAC), 2003, pp. 65-70.
[32] S. M. Martin, et al., "Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads," in Proc. IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2002, pp. 721-725.
[33] D. Shin and J. Kim, "Optimizing Intratask Voltage Scheduling Using Profile and Data-Flow Information," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 2, pp. 369-385, Feb. 2007.
[34] L. Cai and D. Gajski, "Transaction level modeling: an overview," in Proc. IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2003, pp. 19-24.
[35] M. Barnasconi. (2008). SystemC Analog & Mixed Signal Extensions: What's It All About? [Online]. Available: http://www.systemc.org/
[36] M. Agostinelli, et al., "SystemC-AMS modeling and simulation of digitally controlled DC-DC converters," in Proc. IEEE Applied Power Electronics Conference and Exposition (APEC), Palm Springs, CA, USA, 2010, pp. 170-175.
[37] M. Vasilevski, et al., "Modeling Wireless Sensor Network nodes using SystemC-AMS," in Proc. ACM Internatonal Conference on Microelectronics (ICM), 2007, pp. 53-56.
[38] P. A. Hartmann, et al., "Modelling control systems in SystemC AMS - Benefits and limitations," in Proc. IEEE International SOC Conference (SOCC), 2009, pp. 263-266.
[39] G. P. Ltd. (2009). MCS-51™ Instruction Set Summary. [Online]. Available: http://www.grantronics.com.au
[40] ARM. (2009). µVision® IDE & Debugger. [Online]. Available: http://www.keil.com/uvision/
[41] S. Heo, et al., "Reducing power density through activity migration," in Proc. International Symposium on Low Power Electronics and Design (ISLPED), 2003, pp. 217-222.
[42] S. Murali, et al., "Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization," in Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE), 2008, pp. 110-115.
[43] K. Skadron, et al., "Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management," in Proc. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2002, pp. 17-28.
[44] ROHM. (2008). TR Things to be noted before calculating the TR die temperature. [Online]. Available: http://www.rohm.com/products/discrete/transistor/tr-element/
[45] Actel. (2006). HiRel SX-A Family FPGAs. [Online]. Available: http://www.alldatasheet.net/datasheet-pdf/pdf/262165/ACTEL/A54SX32A-1CQ208M.html
[46] R. Mukherjee and S. O. Memik, "Physical Aware Frequency Selection for Dynamic Thermal Management in Multi-Core Systems," in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2006, pp. 547-552.
[47] S. Murali, et al., "Temperature-aware processor frequency assignment for MPSoCs using convex optimization," in Proc. IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2007, pp. 111-116.
[48] B. Alberto, et al., "The explicit linear quadratic regulator for constrained systems," IFAC Automatica, vol. 38, no. 1, pp. 3-20, Jan. 2002.
[49] M. Grant, et al. (2006). CVX: Matlab software for disciplined convex programming, version 1.0 beta 3. [Online]. Available: www.stanford.edu/~boyd/cvx/
[50] J. Mattingley and S. Boyd. (2011). CVXGEN: Code Generation for Convex Optimization. [Online]. Available: http://cvxgen.com/
[51] M. Huang, et al., "A framework for dynamic energy efficiency and temperature management," in Proc. IEEE/ACM International Symposium on Microarchitecture (MICRO), 2000, pp. 202-213.