| 研究生: |
陳長智 Chen, Chang-Chih |
|---|---|
| 論文名稱: |
具耦合電感之新型七階換流器 A Novel Seven-Level Inverter with Coupled-Inductor |
| 指導教授: |
陳建富
Chen, Jiann-Fuh |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2013 |
| 畢業學年度: | 101 |
| 語文別: | 中文 |
| 論文頁數: | 75 |
| 中文關鍵詞: | 七階換流器 、耦合電感 、電壓平衡 |
| 外文關鍵詞: | seven-level inverter, coupled-inductor, voltage-balancing |
| 相關次數: | 點閱:77 下載:0 |
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本文提出一新型具耦合電感七階換流器,此電路具有低總諧波失真率之多階輸出,利用電容疊接技術以及耦合電感技術使輸出產生七種輸出電壓階。輸入端僅使用單一電源以及兩個輸入電容,故只要控制兩顆輸入電容的能量釋放給予負載是相同,便可使電容電壓達到平衡,不需額外的平衡電路。少了平衡電路,開關元件數目可以大幅減少以及在開關訊號控制上變得較為簡易。
本文設計一輸入360 V直流電壓、輸出380 V交流電壓及輸出功率3 kW之實作電路。實驗結果證明,該七階換流器架構之可行性。
This thesis proposes a novel single-phase seven-level inverter, which produce three levels of voltage variations, hence the seven-level output is achieved. The proposed inverter uses only one DC source and two capacitors. The time period of energy storing and releasing are identical in one switching cycle, Thus capacitor voltage is balanced without voltage-balancing circuit. This is a distinct advantage in comparison with other conventional seven-level structures, which often use three or more capacitors that lead to voltage-unbalancing of capacitors. Simple control strategy is adopted.
The proposed topology has the advantage of low voltage harmonic distortion, absence of voltage-balancing circuit, less input capacitors, smaller low pass filter size, and low switch voltage stress.Experimental results obtained from a 360 V input voltage, 380 Vrms output voltage, and 3 kW output power prototype circuit was presented to verify the system performance.
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校內:2018-07-19公開