支持向量機(SVM)廣泛的使用在人工智慧(AI)的應用上。由於AI應用的高計算複雜度和即時性要求，因此有效率的加速SVM運算是至關重要的。SVM大部分的運算是核函數，支配整個SVM的速度並且需要使用特殊硬體來實現。
在本論文中，我們設計了一個新的SVM硬體加速器，通過改變決策函數的形式並藉由分塊loop迴圈來有效率的加速核函數的計算。此外，我們還設計了一種新的高效固定寬度乘法器，具有非常低的誤差，可用於SVM及任何其他加速器。
因此，我們的SVM加速器與其他加速器相比顯著的提高了檢測速度，並且固定寬度乘法器比其他近似乘法器具有最低的誤差。

Support vector machines (SVMs) are widely used in various artificial intelligence (AI) applications. Due to AI applications’ high computation complexity and real-time requirements, it is critical to speed up the SVM operation efficiently. The most part of the SVM computation is the kernel functions, which dominate the overall SVM speed and need to be implemented with special hardware. In this thesis, we designed a new SVM hardware accelerator that speeds up efficiently the calculation of kernel functions by changing the form of the decision function and by tiling the loops in it. And, we had also designed a new efficient fixed-width multiplier with very low errors for use in this SVM accelerator. Therefore, our SVM accelerator has a significantly improved detection speed compared to others, and the fixed-width multiplier has also the lowest errors than other approximate multipliers.

[1] C. Cortes and V. Vapnik, “Support-vector networks,” Mach. Learn., vol. 20, no. 3, pp. 273-297, 1995.
[2] S. Dumais, J. Platt, D. Heckerman, and M. Sahami, “Inductive learning algorithms and representations for text categorization”, Proceedings of the 7th international conference on Information and knowledge management, 1998, pp. 148-155.
[3] T. Joachims, “Text categorization with support vector machines”, Proceedings of European Conference on Machine Learning(ECML), 1988, pp. 137-142.
[4] E. Osuna, R. Freund, and F. Girosi, “An improved training algorithm for support vector machines”, Neural Networks for Signal Processing VII-Proceedings of the 1997 IEEE Workshop, pp. 276-285.
[5] M. Oren, C. Papageorgiou, P. Sinha, E. Osuna, and T. Poggio, “Pedestrian detection using wavelet templates”, Proceedings Computer Vision and Pattern Recognition, 1997, pp. 193-199.
[6] Dae Hwan Kim, Hyun II Choi, Jin Hyung Kim, “3D Space Handwriting Recognition with Ligature Model”, International Symposium on Ubiquitious Computing Systems, 2006, pp. 41-56.
[7] Christoph Amma, Tanja Schultz, Dirk Gehrig, “Airwriting Recognition using Wearable Motion Sensors”, Proceedings of the 1st Augmented Human International Conference, 2010, no. 10, pp. 1-8.
[8] Kong Jun-qi, “Research of Gesture Recognition and Interaction Model Based on Three Dimensional Accelerometer”, in Chinese, 2009.
[9] N. Shanthi, K. Duraiswamy, “A novel SVM-based handwritten Tamil character recognition system”, Pattern Analysis and Applications, 2010, vol. 3, no. 2, pp. 173-180.
[10] Yan Jun, “Research of Feature Extraction based on Space Handwriting Recognition”, in Chinese, 2012.
[11] C. C. Chang and C. J. Lin, “LIBSVM: a library for support vector machines,” Software available at https://www.csie.ntu.edu.tw/~cjlin/libsvm/.
[12] B. Heisele, T. Serre, S. Prentice, and T. Poggio, “Hierarchical classification and feature reduction for fast face detection with support vector machines”, Pattern Recognition, 2003, vol. 36, no. 9, pp. 2007-2017.
[13] Y. Ma and X. Ding, “Face detection based on cost-sensitive support vector machines”, Pattern Recognition with Support Vector Machines, 2002, pp. 260-267.
[14] S. Cadambi, et al., “A massively parallel FPGA-based coprocessor for support vector machines”, Proceedings of the 17th IEEE Symposium on Field Programmable Custom Computing Machine, 2009, pp. 115-122.
[15] O. Pina-Ramirez, R. Valdes-Cristerna, and O. Yanez-Suarez, “An FPGA implementation of linear kernel support vector machines”, Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGA’s, 2006, pp. 1-6.
[16] M. Ruiz-Llata, G. Guarnizo, and M. Yébenes-Calvino, “FPGA implementation of a support vector machine for classification and regression”, Proceedings of International Joint Conference on Neural Networks, 2010, pp. 1-5.
[17] J. Fowers, G. Brown, P. Cooke, and G. Stitt, “A performance and energy comparison of FPGAs, GPUs, and multicores for sliding-window applications”, Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, 2012, pp. 47-56.
[18] I. Kukenys and B. McCane, “Classifier cascades for support vector machines”, Processing 23rd International Conference Image Vision Computing, 2008, pp. 1-6.
[19] C. Kyrkou, Christos-Savvas Bouganis, T. Theocharides, and Marios M. Polycarpou, “Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines”, IEEE Transactions on Neural Networks and Learning Systems, 2016, vol. 27, no. 1, pp. 99-112.
[20] Y. Jiang, K. Virupakshappa, and E. Oruklu, “FPGA Implementation of a Support Vector Machine Classifier for Ultrasonic Flaw Detection”, IEEE 60th International Midwest Symposium on Circuits and Systems, 2017, pp.180-183.
[21] J. M. Jou, S. R. Kuang, and R. D. Chen, “Design of Low-Error Fixed-Width Multipliers for DSP Applications,” IEEE Trans. Circuits syst., vol. 46, no. 6, 1999.
[22] D. De Caro, N. Petra, V. Garofalo, A.G.M. Strollo, “Fixed-width multipliers and multipliers-accumulators with min-max appr-oximation error,” IEEE Trans. Circuits Syst., 2013, vol. 60, no. 9, pp. 2375–2388.
[23] C. Kyrkou, C.-S. Bouganis, T. Theocharides, and M. M. Polycarpou, “Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines,” IEEE Trans. on Neural Netw. and Learning Syst., 2016, vol. 27, no. 1, pp. 99–112.