本論文主旨在於研製一新型多階層換流器。本架構之主要概念為應用多繞組之耦合電感，來取代傳統架構中用來分壓之電解電容。如此一來，該電路之壽命即不會受限於電解電容。由於電路不需要藉由電容將輸入電壓分層，因此不需要額外的平衡電路。除了上述優點，本架構也減少了功率元件的使用，僅需十顆開關即可使產生七階層的輸出。本論文中將會說明電路工作原理以及控制概念、流程。控制器採用TI公司所生產的TMS320F28035數位訊號處理器來實現。最後將研製一輸入電壓320V，輸出功率220 Vrms/3kW之實驗室雛形電路用以驗證電路效能，其滿載效率為94.82%，最大效率於74.34%負載為96.39%，最後並提出其延伸電路。

In this thesis, a novel multilevel electrolytic capacitor-less inverter is proposed. With the three-winding coupled inductor, input voltage can be divided without electrolytic capacitors. Hence, no voltage-balancing circuit is needed. Less power switches are required for the proposed circuit compared to the existing topologies. Only ten switches are required to generate seven-level output. The operating principle, mode analysis and modulation method are introduced. The control scheme is implemented by TMS320F28035. Finally, a laboratory prototype of seven-level inverter with 320V input voltage and 220 Vrms/3kW output is implemented. The efficiency under full load is 94.82%, the maximum efficiency is 96.39% under 74.34 % load. Lastly, extended circuits are also proposed.

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