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研究生: 郭韋廷
Kou, Wei-Ting
論文名稱: 應用於電流式電化學感測器之恆定電位讀取電路
CMOS Potentiostat for Amperometric Chemical Sensors
指導教授: 黃弘一
Huang, Hong-Yi
羅錦興
Luo, Ching-Hsing
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 中文
論文頁數: 99
中文關鍵詞: 全差動式恆定電位讀取電路動態範圍感測器
外文關鍵詞: Potentiostat, Fully-differential, Dynamic range, Sensor
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  • 本篇論文提出兩種應用於電流式電化學感測器之高線性度及動態範圍的恆定電位讀取電路(Potentiostat)。一種為單端輸出(Single-ended)設計,另ㄧ種為全差動式(Fully-differential)輸出設計,此恆定電位讀取電路有別於傳統架構,其基本組成元件有控制定電位放大器(Control amplifier)、電流鏡(Current mirror)、轉阻放大器(Transimpedance amplifier)。針對以往恆定電位讀取電路會造成電極電位飄動的現象及無法應用於多種感測器的缺點,在此提出一個新的控制和讀取電路架構與感測器的介面連結方式,來解決上述問題。此外,一般的恆定電位讀取電路都是採用「單端輸出」的模式,因而有輸出電壓範圍受限、低輸出擺幅的缺點。而在偵測小電流時,其急遽增加的諧波失真將會降低電路的線性度,造成可偵測電流範圍受限的情況,意即有較低的動態範圍(Dynamic range),進而無法符合多種感測器的訊號規格。因而在此提出另一個「全差動式恆定電位讀取電路」來解決這些問題。而感測器輸出電流在電路中傳遞的準確度將會影響電路的線性度,因此同時採用廣輸出擺幅疊接電流鏡的架構,來降低電流傳遞的不匹配量,以此增加電路的線性度。本研究兩種架構皆使用台積電0.18微米1P6M的製程,由量測結果顯示,全差動式恒定電位讀取電路於可偵測電流範圍500pA~10uA下,電路維持了較佳的線性度,因而動態範圍可達86dB,其輸出擺幅更可為單端設計的兩倍左右。

    A single-ended potentiostat topology with a new interface connection between sensor electrodes and potentiostat circuit to avoid deviation of cell voltage and linearly convert the cell current into voltage signal is presented. Additionally, due to the increased harmonic distortion quantity when detecting low-level sensor current, the performance of potentiostat linearity is relatively decrease which causes the detectable current and dynamic range to be limited. Thus, to alleviate these irregularities, a fully-differential potentiostat, which has a wide output voltage swing compared to single-ended potentiostat is also presented. Two proposed potentiostat were implemented using 0.18-μm CMOS process for biomedical application. Measurement results show that the FD potentiostat performs relatively better in terms of linearity when measuring current from 500pA to 10uA. Besides, the dynamic range value can reach a gain of 86dB.

    目錄 中文摘要…………………………………………………………………I 英文摘要……………………………………………………………. II 誌謝………………………………………………...……………..III 目錄……………………………………………………………….....IV 圗目錄…………………………………………………………...…VII 表目錄………………………………………………………………...XI 第一章 緒論 1 1.1 研究動機 1 1.2 論文架構 2 第二章 恆定電位讀取電路架構簡介 3 2.1 感測器(Sensor)簡介 3 2.2 恆定電位讀取電路簡介 4 2.3 恆定電位讀取電路各式架構 6 2.3.1 控制定電位架構 6 2.3.2 電流訊號量測架構 9 第三章 恆定電位讀取電路設計 17 3.1 單端輸出恆定電位讀取電路(Single-Ended Potentiostat) 17 3.1.1 設計原理 17 3.1.2 建構方塊圖 18 3.1.3 電路實現 18 3.2 全差動式恆定電位讀取電路(Fully-Differential Potentiostat) 21 3.2.1 設計原理 21 3.2.2 建構方塊圖 22 3.2.3 電路實現 23 第四章 電路模擬結果與討論 28 4.1 模擬考量 28 4.2 感測器訊號及等效阻抗 29 4.3 模擬結果 - 單端輸出電路 30 4.4 模擬結果 - 全差動式輸出電路 34 4.5 預計規格列表 44 第五章 晶片佈局與量測結果 46 5.1 晶片佈局(Layout Arrangement) 46 5.1.1 單端輸出恆定電位讀取電路佈局 46 5.1.2 全差動式恆定電路讀取電路佈局 49 5.1.3 晶片打線圖 53 5.2 量測方法與結果 55 5.2.1 量測考量 55 5.2.2 量測電路版設計 57 5.2.3 量測結果 60 5.2.4 電化學量測 76 第六章 結論與未來展望 89 6.1 結論 89 6.2 未來展望 89 Reference 90 簡歷 92 附錄 93

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