隨著半導體元件尺寸微縮之需求，矽基電晶體已達到其材料限制，故研究新型可替代矽的新材料越顯重要。本論文中，將研究半導體高移動率新型材料─矽鍺化合物半導體，以超高真空化學氣相沉積(UHVCVD)磊晶矽鍺薄膜後，使用離子佈值(Ion Implant)技術並探討P型載子硼之活化情形，磊晶矽鍺薄膜中應力效應可提升矽鍺化合物之移動率，進一步成為取代半導體矽通道材料之優勢，為了維持磊晶矽鍺薄膜之應力且同時達到載子活化效果，本論文利用了新型退火方式─低熱預算之微波退火探討新材料的活化及應力維持之研究。
本論文中，將分成兩部份: 不同載子離子佈值進不同鍺比例之磊晶矽鍺薄膜與非晶化高溫離子佈值之研究。第一部分，以不同載子之離子佈值(硼，矽與硼)摻雜進入不同鍺比例之矽鍺材料，接著使用低能量微波退火製程與傳統RTA，並以阻值、磊晶薄膜繞射分析、TEM、拉曼光譜、霍爾量測等分析方法做比較，發現使用一階段微波退火能量3P，能使硼離子佈值進30% Ge比例之矽鍺材料有最低的阻值(170 ohm/sq)、最佳的磊晶薄膜品質、最小的佈值缺陷厚度(16nm)及最好的殘留應力指數(1.48%)，第二部分，發現非晶化離子佈值(矽與硼)且使用150度高溫離子佈值製程可有效降低非晶化離子佈值對於矽鍺材料所造成之晶格破壞，且在微波退火能量3.5P時能使40% Ge比例之矽鍺材料有最佳的阻值與缺陷厚度之表現，接著使用兩階段微波退火能量3P+1P持續時間100秒，能在不發生應力鬆弛的情況下有效地提高摻雜硼離子活化程度(activation level)，其片電阻值低至134.6 ohm/sq，霍爾量測之遷移率302.7 cm2/Vs。
最後，我們探討不同表面覆蓋層對矽鍺材料之影響，發現在矽鍺表面沉積一層超薄矽覆蓋層薄膜，可有效降低其離子佈值所帶來的晶格破壞，與在退火過程中使用二氧化矽覆蓋層比較，其表面有較低的粗糙度(Rq=0.63 nm)及較佳的電性表現，並用X光光電子能譜儀(XPS)確認超薄矽覆蓋層薄膜在退火製程後仍然存在，可進一步提升矽鍺/金屬閘極間界面之特性。
本論文顯示低熱預算微波退火方式有助於矽鍺新型材料之載子活化，並證明微波退火比傳統RTA更能夠幫助應力之維持且同時提升P型載子活化程度，而對於表面覆蓋層也有正面幫助。

As the miniaturization of the size of semiconductor components, silicon-based transistor has reached its material limitations, so that researching the new materials to replace silicon is more important. In this thesis, we will study the high mobility semiconductor channel material – silicon-germanium compound. After preparing silicon germanium layer on Si substrate by ultra-high vacuum chemical vapor deposition (UHVCVD), the ion implantation technology is conducted to discuss the activation issue of p-type dopants, due to silicon germanium epitaxial layer has the stress effect to enhance the carrier mobility, it is in conflict of high temperature annealing. In order to maintain the stress of the epitaxial silicon germanium layer and achieve the activation level of carrier at the same time, this paper explores a new annealing method - microwave annealing with low thermal budget.
In this thesis, we divided into two parts: First is the different dopants implanted into different germanium content samples and second is high ion implantation temperature for pre-amorphous process. In the first part, we found that the use of the one-step microwave annealing energy 3P, which can make boron implanted into 30% Ge content of silicon germanium layer has the lowest sheet resistance (170 ohm / sq), the best epitaxial layer quality, the minimum end-of-range defect thickness (16nm) and the better residual stress index (1.48%).
In the second part, we found that the pre-amorphous process by using silicon and boron implanted at high implantation temperature (150℃) can effectively reduce the damage caused by ion implantation, and microwave annealing energy 3.5P for 40% Ge content sample has the ability to make the best performance of sheet resistance and defect thickness. And then use two-step microwave annealing energy (3P+1P/100s), it can further achieve higher activation level for boron implanted into 30% Ge content sample without stress relaxation. (Sheet resistance as low as 134.6 ohm / sq, Hall measurement mobility of 302.7 cm2 / Vs.)
Finally, we discuss the effect of different surface capping layer on the silicon germanium material. It is found that the deposition of ultra-thin Si capping layer on the surface can effectively reduce the lattice damage caused by implantation, and it has the better roughness performance (Rq = 0.63 nm) and electrical properties compare to SiO2 capping layer during annealing. The X-ray photoelectron spectroscopy (XPS) confirmed that the ultra-thin silicon capping layer still exists after annealing process, can further enhance the silicon germanium / metal gate interface characteristics.
This thesis shows that the low thermal budget microwave annealing contributes to the activation of the carrier of the silicon germanium material and proves that the microwave annealing is more effective than the traditional RTA to help maintain the stress while increasing the activation level of the p-type dopant. And it has the positive effect for ultra-thin Si capping layer.

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