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研究生： 吳亦智
Wu, I-Chih
論文名稱： 應用非破壞性分析於系統構裝不連續點檢測之探討
Discontinuous path detection based on non-destructive analysis for SOC application
指導教授： 張凌昇
Jang, Ling-Sheng
學位類別： 博士
Doctor
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2018
畢業學年度： 106
語文別： 英文
論文頁數： 81
中文關鍵詞： 板級可靠度實驗 、故障位置 、格狀接地 、時域反射偵測法 、鎖相熱影像檢測法
外文關鍵詞： board level reliability, fault location, pattern ground, time-domain reflectometry, lock-in thermography
相關次數： 點閱：58  下載：0 
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    • 於積體電路構裝之可靠度評估中，評估墜落衝擊是其中的主要關鍵，尤其是在可攜式電子產品上之應用。本論文的目標是以實驗性的方式偵測於板級可靠度實驗後電子構裝的受損位置，板級墜落實驗可協助了解對於不同銲接構裝於印刷電路板上的墜落耐久特性。在產品未上市前的評估週期中，其必須以菊花鏈的結構來評估晶片構裝與電路板間的焊錫接合點也是相當重要的。
    然而，至今仍無相關的文獻來詳細探討以圖騰式斜網狀銅層當成接地時，高速訊號響應的實際工作情況。而板級可靠度試板即為網狀銅層接地。在本文中，試以時域反射的非破壞性方法，來量測出菊花鏈結構在圖騰式接地設計下的故障位置。其結果證實，時域反射量測手法確實可由響應波形的變化來指定在線段內之高阻抗斷路點的位置。關於路徑內小阻值的龜裂，以鎖相熱影像檢測法的特性，反而能有效率的偵測出小阻值的龜裂位置。但因電流無法流過高阻值的開路故障模式，鎖相熱影像檢測法無法量測開路問題。是故，時域反射與鎖相熱影像檢測有互補的特性。最後，針對鎖相熱影像檢測法本身的限制，於開路無法檢測的問題，在本研究也得到良好的解決方案。

    Reliability evaluation of integrated circuit (IC) packages to assess drop impact is critical, especially in the case of handheld electronic products. The objective of this study is to experimentally identify the location of damage in electronic packaging after board level reliability (BLR) evaluations. The BLR drop test is a useful way to characterize the drop durability of different soldered assemblies onto a printed circuit board (PCB). It is also of great importance when there is a need to evaluate the solder joint between the chip package and PCB through a daisy-chained structure during the evaluation period.
    However, there is no detailed information available on a pattern ground with a hatched copper PCB layout for high speed responses that are closely related to actual working conditions. In this paper, a fault location on a daisy-chained structure with a pattern ground is shown through a non-destructive analysis using a time-domain reflectometry (TDR) approach. The results obtained in this project indicate that the TDR approach can be used to detect the location of a resistive open in the string based on changes in the waveform response. Regarding the defect mode of micro crack, its resistance is low. The characteristics of lock-in thermography (LIT) approach is efficient to detect the fault location also. But the resistive open is its limitation. Therefore, TDR and LIT are functional complement. The fault location in critical solder balls as predicted by TDR or LIT correlate well with experimental observation using a cross-section. In the paper, we also obtained the solution of open circuit by LIT measurement finally.

    中文摘要 I Abstract II ACKNOWLEDGEMENT III CONTENTS IV LIST OF TABLES VIII LIST OF FIGURES IX CHAPTER 1 Introduction 1 1.1 Background and motivation 1 1.2 Board level reliability tests 1 1.3 Novel approaches for fault localization 2 1.4 Organization of the dissertation 4 CHAPTER 2 Process of Cu-plated Fine Pitch Patterns on Substarte 6 2.1 Fabrication of Cu-plating on flexible polyimide 6 2.1.1 Material selection 7 2.1.2 Evaporation Cu 8 2.1.3 Electroplating Cu 9 2.2 Characterization and discussion 13 2.2.1 Microstructure of copper surface 13 2.2.2 Element analysis by EDS 14 CHAPTER 3 Board Level Reliability Test 17 3.1 Board level reliabilty drop test 17 3.1.1 Setup for BLR drop test 17 3.1.2 Characterization for accelerated calibration 19 3.2 Experimental verification by high speed camera 20 CHAPTER 4 Experimental Method by Lock-in Thermography 24 4.1 Lock-in thermography technical information 24 4.1.1 Principle of lock-in thermography 24 4.1.2 LIT measurement setup 30 4.2 Experimental materials 31 4.2.1 Daisy chain structure by RDL in WLCSP 31 4.2.2 Specimen decision through Weibull analysis 32 4.3 Fault localization and failure analysis 34 4.3.1 Characterization for LIT 34 4.3.2 LIT pre-evaluation by traditional package 35 4.3.3 Nondestructive analysis by LIT 39 4.3.4 Verify defect mode by destructive analysis 40 4.3.5 Technique limitations 43 4.4 Summary 46 CHAPTER 5 Failure Analysis by Time Domain Reflectometry 48 5.1 Technology of time domain reflectometry 48 5.1.1 Principle of TDR 48 5.1.2 Pre-evaluation for fault localization by TDR 49 5.2 Experimental specimens 51 5.2.1 Daisy chain structure in LFBGA160 51 5.2.2 Specimen decision through Weibull analysis 53 5.3 Fault localization by nondestructive analysis through TDR evaluation 56 5.3.1 Modeling process with pattern ground 56 5.3.2 Simulation for effective relative permittivity 62 5.3.3 Non-destructive analysis by TDR 63 5.4 Destructive analysis for verification 67 5.4.1 Verify defect mode by cross-section and SEM 67 5.5 Summary 69 CHAPTER 6 Conclusions and Future Research Directions 71 6.1 Conclusions 71 6.2 Future Research Directions 71 PUBLICATIONS 76 VITA 76 REFERENCES 76

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