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研究生: 歐孟岳
Ou, Meng-Yueh
論文名稱: 應用於無線感測網路生醫信號擷取之低電壓低功率2.4 GHz CMOS 直接降頻前端接收器
A Low-Voltage and Low-Power 2.4 GHz CMOS Direct-Conversion Receiver for Bio-Acquisition in Wireless Sensor Network
指導教授: 黃弘一
Huang, Hong-Yi
羅錦興
Luo, Ching-Hsing
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 英文
論文頁數: 75
中文關鍵詞: 無線感測網路低電壓低功率前端接收器
外文關鍵詞: Low-Voltage, Wireless Sensor Network, Low-Power, Front-End Receiver
相關次數: 點閱:97下載:3
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  • 本篇描述應用於無線感測網路生醫信號擷取之無線前端接收器,前端電路包含疊接式低雜訊放大器、主動式平衡器、折疊式偶次諧波混波器。平衡器是採用電阻電容迴授補償式差動放大器的架構,將單端輸入信號轉成差動信號。在本地震盪器前使用倍頻電路,將本地震盪器信號頻率加倍,因此可以避免由於本地震盪器信號洩漏而產生的自混頻。為了應用於低電壓架構且得到較大的本地震盪器信號穩定輸入範圍,偶次諧波混波器則利用摺疊的技術和互補式倍頻電路。本次設計之無線前端接收器電路操作在供應電壓1V,有8.5 dB的轉換增益,-36 dBm之輸入1-dB截斷點,及5.0 mW的功率損秏。

    This work describes the design of a wireless receiver front-end circuit for Bio-Acquisition in Wireless Sensor Network (WSN). The front-end circuit includes a cascode low noise amplifier (LNA), an active balun and a folded-cascode even-harmonic mixer. The balun employs differential amplifier architecture utilizing the concept of RC feedback to transform single-ended signal into differential form. The frequency-doubling circuit in the LO stage is employed to double the LO frequency, thus the self-mixing resulted from LO leakage could be avoided. The even-harmonic (EH) mixer with folded technique and complementary frequency-doubling circuits is adopted for low voltage topology to achieve large stable LO turning range. This work possesses conversion gain of 8.5 dB, 1-dB compression point (IP1dB) of -36 dBm, power consumption of 5.0 mW at 1V supply voltage.

    摘要 ………………………..…..……………………………......I ABSTRACT…………………..……………………………....II 誌謝 ………………………..…..…………………………......III CONTENTS……………………………………………….…IV FIGURE CAPTIONS…………………………….…..….....VII TABLE CAPTIONS…………………………….………...…IX CHAPTER ONE Introduction 1.1 Motivation - 1 - 1.2 Thesis Organization - 2 - CHAPTER TWO Basic Concepts in RF Design - 3 - 2.1 Introduction - 3 - 2.2 Radio-Frequency Fundamentals - 4 - 2.2.1 Gain and Stability - 4 - 2.2.2 Noise Figure and Sensitivity - 5 - 2.2.3 Linearity - 7 - 2.3 Receiver Architecture - 12 - 2.3.1 Heterodyne Receiver - 12 - 2.3.2 Homodyne Receiver - 14 - 2.3.3 Low-IF Receiver - 18 - CHAPTER THREE Design Consideration in Front-End Circuit Design - 19 - 3.1 Low Noise Amplifier Basic - 19 - 3.1.1 Low Noise Amplifier Architecture Analysis - 19 - 3.1.2 Low Noise Amplifier Design - 23 - 3.2 Balun Basic - 24 - 3.2.1 Balun Architecture Analysis - 24 - 3.2.2 Differential Amplifier with an RC Feedback as Active Balun Analysis - 27 - 3.3 Down-Conversion Mixer Basic - 28 - 3.3.1 Down-Conversion Mixer Architecture Analysis - 28 - 3.3.2 Conversion gain analysis - 31 - 3.3.3 Noise analysis - 31 - 3.3.4 Port-to-Port Isolation analysis - 32 - CHAPTER FOUR The 2.4 GHz Low-Voltage Even-Harmonic Mixer 4.1 The LO-RF Leakage of Receiver - 33 - 4.2 Analysis of Even-Harmonic mixer - 35 - 4.2.1 The frequency-doubling circuit architecture - 36 - 4.2.2 The folded-cascode even-harmonic mixer - 37 - 4.2.3 The folded-cascode even-harmonic mixer with complementary frequency-doubling circuit - 41 - 4.3 Circuit Simulation Result - 44 - 4.4 Discussions - 47 - CHAPTER FIVE Low-Voltage Low-Power Front-End Circuit - 48 - 5.1 Introduction - 48 - 5.2 Principle of the Circuit Design - 49 - 5.2.1 Low Noise Amplifier - 50 - 5.2.2 Balun - 53 - 5.2.3 EH mixer - 56 - 5.3 Chip Implementation and Measured Result - 56 - 5.4 Discussions - 66 - CHAPTER SIX Conclusion and Future Work - 70 - 6.1 Conclusion - 70 - 6.2 Future Work - 70 - 6.2.1 Improve the performances of the receiver - 70 - 6.2.2 Complete the receiver - 71 - REFERENCES - 73 -

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    [22] 詹維嘉,利用複數導數相消之低功率、高線性度混波器,國立交通大學電子工程研究所碩士論文,民國九十四年

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