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研究生: 王祈翔
Wang, Chi-Hsiang
論文名稱: 透過整數線性規劃演算法適用於電源門控設計且能考慮電壓降之有效電源網路合成
Effective Power Network Synthesis for Power Gating Designs with IR-Drop Consideration Using Integer Linear Programming
指導教授: 林家民
Lin, Jai-Ming
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2024
畢業學年度: 113
語文別: 英文
論文頁數: 41
中文關鍵詞: 電壓降電源網路合成整數線性規劃電源門控設計
外文關鍵詞: IR-drop, Power Network Synthesis (PNS), Integer Linear Programming (ILP), Power Gating Designs
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  • 電源門控(power gating)是低功耗設計中的一項重要技術,其中電路被劃分為多個電源域(power domains),以便可以獨立關閉每個電源域的電源供應。然而,這使得電源網絡規劃變得更為複雜,因為不同電源域中的電源網不能重疊。為了加速這一過程,本篇論文提出了一種方法,能夠自動為每個電源域合成各自的電源供應網絡,同時最小化晶片整體的電壓降。首先,我們的方法會為每個電源域建立一個生成圖(spanning graph),其中包含所有可能的電源供應路徑。然後,我們使用整數線性規劃來決定合適的電源供應路徑數量以及其繞線拓撲(routing topology)。最後,我們會通過更改連接點來優化繞線路徑,避免這些路徑被其他網絡阻擋導致最終繞線失敗。實驗結果顯示與貪婪方法(greedy approach)相比,我們的方法在工業設計中能夠得到更少的電壓降。

    Power gating is an important technique in low-power designs, where circuits are partitioned into several power domains (PDs) so that the power supply in each PD can be turned off independently. However, this complicates powerplanning since power nets in different PDs cannot cross. To expedite this process, this thesis proposes an automatic approach to synthesizing a power delivery network (PDN) for each PD to minimize IR-drop. First, a spanning graph is constructed for possible power delivery paths in each PD. Then, we apply integer linear programming (ILP) to determine the suitable number of power delivery paths (PDPs) and their routing topologies. Finally, we refine the routing paths by changing the connection points if they are blocked by other nets. Experimental results show that our method results in less IR-drop compared to a greedy approach in industry designs.

    摘要 I Abstract II 誌謝 III Table of Contents IV List of Tables VI List of Figures VII Chapter 1 Introduction 1 1.1 The Structure of A PDN 3 1.2 Previous Works 4 1.3 Motivation 5 1.4 Our Contribution 6 1.5 Thesis Organization 7 Chapter 2 Problem Formulation 8 Chapter 3 Overview of Our Methodology 9 Chapter 4 Preprocessing 10 Chapter 5 Determination of PDP Topologies for All PDs 13 5.1 Construction of Routing Grids 14 5.2 Determination of PD Ordering 14 5.3 Construction of A Spanning Graph 15 5.4 Determination of The Topology of PDPs Based on ILP 17 Chapter 6 PDP Routing 20 6.1 Determination of Net Ordering 20 6.2 Net Routing by An L-shaped Path 21 6.3 Post Optimization 22 Chapter 7 Experimental Results 24 7.1 Comparison of Results Using Two Different Cost Functions 25 7.2 Comparison of Two Different PDP Construction Methods 27 Chapter 7 Conclusion 30 Bibliography 31

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