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研究生： 邱薪育
Ciou, Sin-Yu
論文名稱： 一個適用於三軸MEMS壓電加速規之低功耗讀取電路
A Low Power Readout Circuit for a Tri-axial Piezoelectric MEMS Accelerometer
指導教授： 張順志
Chang, Soon-Jyh
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2022
畢業學年度： 111
語文別： 英文
論文頁數： 70
中文關鍵詞： 三軸壓電加速規 、轉阻器 、逐漸趨近式類比至數位轉換器 、同時取樣 、低功耗 、低面積負擔
外文關鍵詞： Tri-axial piezoelectric accelerometer, transimpedance amplifier (TIA), successive approximation register (SAR) analog-to-digital converter (ADC), simultaneous sampling, low power, low area overhead
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    • 本論文提出一個適用於三軸MEMS壓電加速規之低功耗讀取電路，此設計以台積電180奈米製程實作晶片。此讀取電路由逐漸趨近式類比至數位轉換器與類比前端電路組成，包含轉阻放大器，低通濾波器和帶阻濾波器。此轉阻放大器將加速規感應震動所產生的電流訊號轉換為電壓訊號，並送至濾波器進行放大和濾波。逐漸趨近式類比至數位轉換器的取樣電路則採用提出的同時取樣電路進行替換，以保留三軸訊號之間的相關性以及節省晶片面積。
    量測結果顯示此讀取電路能感測±10個加速度的範圍，加速規的靈敏度為每加速度173.43毫伏。此加速規的非線性度為0.43%，表示輸入加速度和輸出信號之間有良好的線性關係。此讀出電路在供應電壓為1.8伏且每秒取樣十萬次的操作速度下，功率消耗為0.196毫瓦。

    This thesis presents a low power readout circuit for a tri-axial piezoelectric MEMS accelerometer in 0.18-μm CMOS process. The readout circuit is composed of a SAR ADC and an analog front-end, including transimpedance amplifier, low-pass filters and notch filter. The proposed transimpedance amplifier converts the sensed current signals into voltage signals, which is amplified and filtered in the later stages. The sample-and-hold circuit of the SAR ADC is replaced with the proposed simultaneous sampling circuit to reserve the correlation of the tri-axial signals and save the chip area.
    The measurement result shows the sensing range of ±10 g and the sensitivity of 173.43 mV/g. The nonlinearity of 0.43% shows the good linear relationship between the input acceleration and the output signal. The readout circuit consumes the power consumption of 0.196 mW at 1.8 V supply voltage under 100 kS/s sampling rate.

    摘 要 I Abstract II List of Tables VIII List of Figures IX Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 3 Chapter 2 Fundamentals of Accelerometers 4 2.1 The Basics of Accelerometers 4 2.1.1 Piezoresistive Accelerometer 4 2.1.2 Capacitive Accelerometer 5 2.1.3 Piezoelectric Accelerometer 6 2.2 Performance Specifications 7 2.2.1 Sensing Range 7 2.2.2 Bandwidth 7 2.2.3 Zero-g Offset 8 2.2.4 Sensitivity 8 2.2.5 Nonlinearity 9 2.2.6 Resonant Frequency 9 2.2.7 Cross-axis Sensitivity 9 2.2.8 Noise Density 10 2.3 Accelerometer Readout Circuit 11 2.3.1 Resistive Accelerometer Readout Circuit 11 2.3.2 Capacitive Accelerometer Readout Circuit 11 2.3.3 Piezoelectric Accelerometer Readout Circuit 12 Chapter 3 Fundamentals of Analog-to-Digital Converter 13 3.1 Analog-to-Digital Converter (ADC) 13 3.1.1 Quantization Error 14 3.1.2 Resolution 15 3.1.3 Accuracy 16 3.2 Static Specifications 16 3.2.1 Offset Error 16 3.2.2 Gain Error 17 3.2.3 Nonlinearity Error 18 3.3 Dynamic Specifications 20 3.3.1 Signal-to-Noise Ratio (SNR) 20 3.3.2 Signal-to-Noise and Distortion Ratio (SNDR) 21 3.3.3 Effective Number of Bits (ENOB) 21 3.3.4 Spurious-Free Dynamic Range (SFDR) 21 3.3.5 Total Harmonic Distortion (THD) 22 3.3.6 Effective Resolution Bandwidth (ERBW) 23 3.3.7 Figure-of-Merit (FoM) 23 3.4 Successive-Approximation Register ADC 24 3.4.1 SAR ADC Operation 24 3.4.2 Capacitor Switching Methods 26 3.4.3 Error Tolerance Techniques 31 Chapter 4 A Readout Circuit for Tri-axial Piezoelectric MEMS Accelerometers 33 4.1 Introduction 33 4.2 Architecture of the Proposed Readout Circuit 34 4.3 Circuit Implementation 36 4.3.1 Transimpedance Amplifier 36 4.3.2 Operational Amplifier 37 4.3.3 Low-pass Filter 38 4.3.4 Notch Filter 40 4.3.5 Bootstrapped Switch 41 4.3.6 Simultaneous Sampling Circuit 42 4.3.7 Dynamic Two-Stage Comparator 46 4.3.8 Capacitive DAC Array 47 4.3.9 Digital Error Correction Decoder 47 4.3.10 Clock Generator 48 Chapter 5 Simulation and Measurement Results 50 5.1 Layout and Chip Floor Plan 50 5.2 Simulation Results 51 5.3 Chip Micrograph and Measurement Setup 56 5.3.1 SAR ADC 57 5.3.2 Readout Circuit 58 5.4 Measurement Results 58 5.4.1 SAR ADC 58 5.4.2 Readout Circuit 60 Chapter 6 Conclusions and Future Works 63 Bibliography 65

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