本論文使用前向尤拉轉換法將永磁同步馬達數學模型離散化，實現永磁同步馬達模型之矽智財(Silicon Intellectual Property , IP)，燒錄至具CPU與FPGA設備Speedgoat驗證，實現永磁同步馬達之硬體迴路系統設計，包含克拉克轉換、帕克轉換、反帕克轉換、SVPWM與電流解耦合之IP，再進行PI控制器設計，完成磁場導向晶片化設計。
本設計皆使用模型化基礎設計實現，透過MATLAB/Simulink與Simulink HDL Coder結合Xilinx之FPGA EDA軟體Vivado，自動生成HDL程式碼(Verilog/VHDL)，可縮短傳統開發IP設計時間，並結合Speedgoat設備與MATLAB/Simulink提供之環境開發具即時性與真實性多元驗證系統。

In this study, the Forward Euler formula method is used to discretize the mathematical model of permanent magnet synchronous motor (PMSM) to realize the Silicon Intellectual Property (IP). The PMSM discretized model and its Field-Oriented Control (FOC) consisting of the PI controller, Clark and Park transform, inverse Park transform, SVPWM and current decoupling were programmed into the IP using the Speedgoat device comprising of CPU and FPGA for the purpose of verifying and realizing the hardware circuit design for the PMSM.
The PMSM model and its FOC control were implemented in MATLAB/Simulink model-based design; and by using the Simulink HDL Coder, the HDL code (Verilog/VHDL) is automatically generated. The IP can as well be synthesized in Simulink by integrating the Xilinx's FPGA EDA software Vivado with Simulink. Hence, the proposed design process significantly shortens the design time when compared with traditional IP development process. Furthermore, the combination of Speedgoat and MATLAB/Simulink used for the system design further verifies the authenticity of the signal.

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