本論文提出一個高效能的橢圓曲線數位簽章處理器，專為質數域下的橢圓曲線密碼學運算所優化。該處理器整合一個高基數的統一模運算單元，可在共享的資料通路中執行模數乘法、加法與減法運算，並搭配一個基於二元歐幾里得演算法的模反運算單元。為了加速橢圓曲線純量乘法，本設計採用Hamburg提出的Montgomery階梯演算法，並透過平行化資料留予明確的Montgomery表示轉換機制來提升效率。所有操作數皆以Montgomery形式進行處理，以確保算術一致性並降低額外開銷。UMAU採用基於基數八的進位儲存加法器結構，並整合優化的商數決定機制，以提升各種模運算的效能。整體架構已於Xilinx Virtex-7現場可程式化邏輯閘陣列上實作，實驗結果顯示本處理器相較於現有的橢圓曲線數位簽章處理器與橢圓曲線處理器設計具有更高的操作頻率、更低的執行延遲，以及更佳的面積時間效率。本設計提供一個緊湊且高效能的硬體解決方案，特別適用於嵌入式與資源受限的安全應用場景中。

This paper presents a high-performance processor that implements the Elliptic Curve Digital Signature Algorithm (ECDSA) for Elliptic Curve Cryptography (ECC) over prime fields. The processor integrates a high-radix Unified Modular Arithmetic Unit (UMAU) that supports modular multiplication, addition, and subtraction within a shared datapath, and a modular inversion unit based on the Binary Euclidean Algorithm. The design utilizes Hamburg’s Montgomery Ladder algorithm to accelerate scalar multiplication through a parallelized dataflow and explicit management of Montgomery form conversions. All operands are processed in the Montgomery domain to maintain arithmetic consistency and reduce overhead. The UMAU employs a radix-8 CSA-based structure and an optimized quotient determination strategy to improve efficiency across all supported operations. The processor was implemented on an Xilinx Virtex-7 FPGA, and experimental results show that it achieves higher operating frequency, reduced execution latency, and better area-time efficiency compared to existing ECDSA and ECC designs. The proposed architecture offers a compact and high-performance hardware solution for cryptographic operations, making it well-suited for secure applications in embedded and resource-constrained environments.

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