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研究生：	胡家瑋 Hu, Chia-Wei
論文名稱：	一個以硬體實現的主動式抗噪系統 A Hardware Implementation of an Active Noise Cancellation System
指導教授：	張順志 Chang, Soon-Jyh
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2019
畢業學年度：	107
語文別：	英文
論文頁數：	66
中文關鍵詞：	主動式噪音消除
外文關鍵詞：	Active noise cancellation
相關次數：	點閱：103 下載：22
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主動式噪音消除技術是藉由產生與噪音源相反相位且同等大小的波形以消除原有噪音。本論文呈現一個使用硬體實現的主動式抗噪系統，系統開發初期先以Arduino UNO系統進行架構與功能驗證，而後將特定功能逐步以積體電路取代，來達到更快的處理速度，避免時間延遲造成系統失敗的情形。本系統的目標應用範圍是能夠處理道路交通噪音頻段250Hz至1kHz。而實際的應用情形，於300Hz至1kHz間，PCB-I及PCB-II分別皆可達到平均8dB音訊抑制的效能表現。

Active noise cancellation technique cancels out noise by producing an inverse signal wave with same amplitude to the noise source. This thesis presents a hardware implementation of an active noise cancellation system. The development starts from adopting Arduino Uno microcontroller board to verify the overall system architecture and its corresponding functionalities, and then replacing specific functions by integrated circuits (ICs) for achieving faster processing speed and avoiding the delay issue which will make noise cancellation fail. The target of this proof-of-concept system is to handle the frequency range about 250Hz to 1-kHz that is the frequency range corresponding to noise around road traffic. In the actual application, within 300Hz to 1-kHz, PCB-I and PCB-II both can achieve an average performance of 8dB reduction, respectively.

摘　要	III
Abstract	IV
List of Tables	VIII
List of Figures	IX
List of Abbreviations	XII
Chapter  1  	Introduction	1
1 Motivation	1
2 Organization of the Thesis	3
Chapter  2   Process of experiment	4
1 Experiment I	5
1.1 Circuit architecture	5
1.2 Delay issue	10
2 Experiment II	11
2.1 Circuit architecture	11
2.2 Glitch caused by ADC0820	15
3 Experiment III	16
3.1 Condenser microphone – details are in section 2.1.1	16
3.2 JFET-input operation amplifier TL072 – details are in section 2.1.1	16
3.3 SAR ADC- details are in chapter3	17
3.4 DAC8541	17
3.5 Coupling capacitor- details are in section 2.1.1	18
4 Summary	18
Chapter  3  Design of analog to digital converter (ADC)	19
1 Introduction	19
2 Design technique for SAR ADC	20
2.1 Capacitor switching method	20
2.2 Direct switching method for digital circuit	23
3 Architecture building blocks of SAR ADC	25
3.1 Bootstrapped switch	26
3.2 Comparator	28
3.3 Dynamic latch in digital control logic	29
3.4 ESD protection circuit	32
4 Simulation and measurement results	34
4.1 Layout and chip floor plan	35
4.2 Simulation results of post-layout simulation	36
4.3 Chip micrograph and measurement setup	39
4.4 Measurement results	41
Chapter  4  	Simulation result and printed circuit board design	45
1 Introduction	45
2 Simulation results of experiment II	46
2.1 Setup for simulation	46
2.2 Relative simulation results	48
3 PCB design	48
4 Layout and photograph of PCB	49
4.1 Experiment II	49
4.2 Experiment III	50
Chapter  5  	Measurement Results	52
1 Perfect simulation results	52
2 Measurement environment	54
3 Measurement results	56
3.1 Performance	56
3.2 Exact delay of PCB system	57
3.3 Power consumption	59
4 Verification	60
5 Summary	61
Chapter  6  	Conclusions and Future Works	62
Bibliography	65


                                    

[1] 噪音控制與防制/ch02 道路噪音/ 盧博堅;劉嘉俊/2011
[2] Lueg Paul, ‘Process of silencing sound oscillations’, Patent No. US2043416A, 1933
[3] Iman Tabatabaei Ardekani and Waleed H. Abdulla, ‘Active noise control in three dimensions’, IEEE Transactions on Control Systems Technology, vol. 22, no. 6, pp. 2150-2159, November 2014
[4] Lam Bhan and Gan Woon-Seng, ‘Active acoustic windows: Toward a quieter home’, IEEE potentials, pp. 11-19, Jan/Feb 2016
[5] ‘Noise and vibration control engineering: Principles and applications’
[6] Mrunali Bari, ‘Performance comparison of LMS algorithms for acoustic noise cancellation’ Conference on advances in signal processing(CASP), Jun 2016
[7] Texas Instrument, ‘TL072 datasheet’
[8] Microchip, ‘ATmega328P datasheet’
[9] Texas Instrument, ‘ADC0820 datasheet’
[10] Texas Instrument, ‘DAC0800 datasheet’
[11] Texas Instrument, ‘DAC8541 datasheet’
[12] C.-C. Liu et al, ‘A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching method’ IEEE Journal of solid-state circuits, Vol. 45, No. 4, April 2010
[13] G.-Y. Huang et al, ’10-bit 30MS/s SAR ADC using a switchback switching method’, IEEE VLSI, Vol. 21, No. 3, March 2013
[14] Y. Zhu et al., “A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 45, pp. 1111–1121, Jun. 2010.
[15] J.-H. Tsai et al., ‘‘A 1-V, 8b, 40MS/s, 113μW Charge-Recycling SAR ADC with a 14μW Asynchronous Controller,’’ in IEEE Symp. VLSI Circuits (SOVC) Dig. Tech. Papers, June 2011, pp. 264–265.
[16] ESD Association, ‘Fundamentals of electrostatic discharge- device sensitivity and testing’, 2010
[17] Ming-Dou Ker, ‘ESD (electrostatic discharge) protection design for Nano electronics in CMOS technology’, IEEE, 2006, pp. 217-279.

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