成功大學博碩士論文系統

簡易檢索 / 詳目顯示

回結果列表

研究生：	鄭明輝 Cheng, Ming-Hui
論文名稱：	使用畫素層級ADC設計對數型CMOS影像感測器 Design of Logarithmic Response CMOS Image Sensor Using Pixel-Level ADC
指導教授：	賴源泰 Lai, Yen-Tai
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2006
畢業學年度：	94
語文別：	英文
論文頁數：	50
中文關鍵詞：	數位影像感測器、對數型影像感測器、多重解析度類比數位轉換器、高動態範圍
外文關鍵詞：	high dynamic range, logarithmic image sensor, digital CMOS image sensor, multi-resolution ADC
相關次數：	點閱：112 下載：11
分享至:	分享至facebook 分享至twitter

查詢本校圖書館目錄查詢臺灣博碩士論文知識加值系統勘誤回報

一般而言CMOS影像感測器的動態範圍都會受限於後級ADC固定的解析度。例如，一個8位元的ADC最多只能提供48dB的動態範圍，若想要增加ADC的解析度則會降低其轉換的速度，使得要實現高速且高動態範圍的CMOS影像感測器將變的相當困難。
在本論文中，我們提出了一個新的方法，利用改變ADC中計數器的時脈頻率來產生對數響應的輸出，使得8位元轉換器可以提供108dB的高動態範圍，且將此種ADC實現在畫素內，稱之為數位畫素感測器(DPS)，其畫素的輸出為數位的格式。此種方式可使得畫素具有較高的讀取速度，使得這個影像感測器可以同時擁有高動態範圍與高速取像的能力。

The dynamic range of CMOS image sensor is generally limited by fixed resolution of the subsequent analog-to-digital converter (ADC). For example, an 8-bit ADC can only provide a 48dB dynamic range. If we want to increase resolution of the ADC to enhance dynamic range, its conversion speed of ADC must be reduced so that readout speed of CMOS image sensor is decreased. As a result, design of high dynamic range and high speed CMOS image sensor will be very difficult.
In this thesis, we proposed a new method to determine the clock frequency of the digital counter in the image sensor. This method can provide logarithmic response output from the ADC, and therefore an 8-bit ADC can provide a 108dB high dynamic range. The ADC of image sensor is placed into a pixel in our design, is called digital pixel sensor so that the output from a pixel is in digital format. This will contribute very high readout speed. With this method, a CMOS image sensor has the ability of high dynamic range and high speed capturing simultaneously.

CONTENTS
ABSTRACT
CONTENTS
LIST OF FIGURES
LIST OF TABLES

CHAPTER 1  Introduction	1
1.1  Background	1
1.2  The Motivation	2
1.3  Organization of The Thesis	3

CHAPTER 2  General Concepts	4
2.1  Brief History of Image Sensors	4
2.2  Imaging System	5
2.3  Image Sensor Architectures	7
2.4  Pixel Structures	9
2.5  Parameters and Nonideality of CMOS Image Sensor	12

CHAPTER 3  Nonlinear Output Characteristic 	15
3.1  The Limit of Dynamic Range	15
3.2  Nonlinear Characteristic	17
3.2.1  Multi-Resolution ADC	19
3.2.2  Logarithmic Response	20
3.3  Digital Pixel Sensor	21
3.4  Summary	29

CHAPTER 4  A Novel Logarithmic CMOS Image Sensor	31
4.1  Design Concepts	31
4.2  Digital Control Circuit	36
4.3  Experimental Results	38
4.4  Summary	47

CHAPTER 5  Conclusions	48
REFERENCES	49
 
LIST OF FIGURES
Figure 2.1 A typical digital imaging system	5
Figure 2.2 (a) Architectures of CCD (b) CMOS image sensor	7
Figure 2.3 (a) operating of a pixel (b) charge versus time for two photocurrents	9
Figure 2.4 Passive Pixel Senor (PPS)	11
Figure 2.5 Active Pixel Sensor (APS)	11
Figure 2.6 FPN images for CCD and CMOS	13
Figure 3.1 Pixel array with 8-bit ADC	15
Figure 3.2 Typical and desired output responses	17
Figure 3.3 Example of multi-resolution ADC	18
Figure 3.4 Nonlinear via multi-resolution ADC	19
Figure 3.5 A ideal nonlinear response: logarithmic response	20
Figure 3.6 Simple DPS pixel block diagram	21
Figure 3.7 Single-slope ADC operation	23
Figure 3.8 Comparator/latch pair operation	24
Figure 3.9 (a) CPS block diagram. (b) CPS operation timing diagram.	26
Figure 3.10 The circuit schematic of CPS	27
Figure 3.11 Measured output response of CPS in paper	28
Figure 3.12 The architecture of the time-based DPS	28
Figure 3.13 The timing diagram of the time-based DPS	29
Figure 4.1 Logarithmic curves using exponential photocurrent distribution	32
Figure 4.2 Scheme of pixel output voltage with the integration time	34
Figure 4.3 Digital code should maintain at appropriate time	35
Figure 4.4 Digital control circuit block diagram	37
Figure 4.5 Example of operation for the lookup table	38
Figure 4.6 (a) Output characteristics for   	40
Figure 4.6 (b) Output characteristics for   (logarithmic coordinate)	40
Figure 4.7 Error for  	41
Figure 4.8 (a) Output characteristics for  	42
Figure 4.8 (b) Output characteristics for   (logarithmic coordinate)	42
Figure 4.9 Error for  	43
Figure 4.10 (a) Output characteristics for  	44
Figure 4.10 (b) Output characteristics for   (logarithmic coordinate)	44
Figure 4.11 Error for  	45

LIST OF TABLES
Table 2.1 Comparison of CCD and CMOS	9
Table 3.1 3-bit Gray code quantization table	24
Table 4.1 The relationship between the photocurrent and digital code	31
Table 4.2 The relationship among the  , the   and digital code	35
Table 4.3 The time is required for every code	36
Table 4.4 Mapping relationship of lookup table for  	39
Table 4.5 Mapping relationship of lookup table for  	43
Table 4.6 Mapping relationship of lookup table for  	45
Table 4.7 Comparison of counter requirement and error	46

                                    

References

[1] A. El Gamal and H. Eltoukhy, “CMOS IMAGE SENSORS,” IEEE Circuits and Devices Magazine, vol. 21, pp. 6-20, 2005.

[2] S. Kavadias, B. Dierickx, D.Scheffer, A. Alaerts, D. Uwaerts and J. Bogaerts, “A Logarithmic Response CMOS Image Sensor with On-Chip Calibration,” IEEE Journal of Solid-State Circuits, vol. 35, no. 8, pp.1146-1152, 2000.

[3] L.-W. Lai, C.-H. Lai and Y.-C. King, “A Novel Logarithmic Response CMOS Image Sensor with High Output Voltage Swing and In-Pixel Fixed-Pattern Noise Reduction,” IEEE Sensor Journal, vol. 4, no. 1, pp. 122-126, 2004.

[4] G. Weckler, “Operation of p-n junction photodetectors in a photon flux integrating mode,” IEEE J. Solid-State Circuits, vol. 2, pp. 65–73, Sept. 1967.

[5] P. Denyer, D. Renshaw, G. Wang, M. Lu, and S. Anderson, “On-chip CMOS sensors for VLSI imaging systems,” in Proc. VLSI-91, 1991, pp. 157–166.

[6] T. F. Knight, “Design of an Integrated Optical Sensor with On-Chip Preprocessing,” PhD thesis, MIT, 1983

[7] M. Sayag, “Non-linear Photosite Response in CCD Imagers,” U.S Patent No.5,055,667, 1991. Filed 1990

[8] O. Yadid-Pecht and E. Fossum. “Wide Intrascene Dynamic Range CMOS APS Using Dual Sampling,” IEEE Transactions on Electronic Devices, 44(10):1721-23, October 1997

[9] Y.-C. Chuang, S.-F. Chen, S.-Y. Huang and Y.-C. King, “Low-Cost Logarithmic CMOS Image Sensing By Nonlinear Analog-To-Digital Conversion,” IEEE Transactions on Consumer Electronics, vol. 51, no. 4, pp. 1212-1217, Nov. 2005.

[10] D. Yang, A. El Gamal, B. Fowler and H. Tian, “A CMOS Image Sensor with Ultra Wide Dynamic Range Floating Point Pixel Level ADC,” ISSCC Digest of Technical Papers, San Francisco, CA, February 1999

[11] D. Yang, B. Fowler and A. El Gamal, “A Nyquist Rate Pixel Level ADC for CMOS Image Sensors,” IEEE Journal of Solid State Circuit, pp. 348-356, March 1999

[12] S. Kleinfelder, S. H. Lim, X. Q. Liu and A. El. Gamal, “A 10,000 Frames/s CMOS Digital Sensor,” IEEE Journal of Solid Stage Circuits, Vol. 36, No. 12, December 2001

[13] C.-H. Lai, Y.-C. King and S.-Y. Huang, “A 1.2-V 0.25μm Clock Output Pixel Architecture with Wide Dynamic Range and Self-Offset Cancellation,” IEEE Sensors Journal, vol. 6, no. 2, pp. 398-405, Apr. 2006.

[14] A. Kitchen, A. Bermark and A. Bouzerdoum, “A Digital Pixel Sensor Array with Programmable Dynamic Range,” IEEE Transactions on Electron Devices, vol. 52, no. 12, pp. 2591-2601, Dec. 2005

[15] A. Bermak, “A CMOS imager with PFM/PWM based analog-to-digital converter,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 4, May 2002, pp. 53–56.

[16] A. Kitchen, A. Bermak, and A. Bouzerdoum, “A PWM digital pixel sensor based on asynchronous self-resetting scheme,” IEEE Electron Device Lett., vol. 25, no. 7, pp. 471–473, Jul. 2004.

[17] J. Doge, G. Schonfelder, G. T. Streil, and A. Konig, “An HDR CMOS image sensor with spiking pixels, pixel-level ADC, and linear characteristics,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 49, no. 2, pp. 155–158, Feb. 2002.

[18] E. Culurciello, R. Etienne-Cummings, and K. A. Boahen, “A biomorphic digital image sensor,” IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 281–294, Feb. 2003.

校內：2007-07-20公開
校外：2007-07-20公開

簡易檢索 / 詳目顯示

相關論文