現今半導體製程技術進入奈米世代，單一晶片電晶體的密度也愈來愈高，使用者對於電子產品功能性的要求也日益增加。因此，功能強大的手持式設備也隨之出現。但手持式設備以電池為供應電源，使用時間受限於有限的能量。因此，唯有藉由降低系統的能量消耗或增加電池的容量，進而延長設備的使用時間。我們提出一個以降低能量消耗導向之硬體分割方法，在系統設計初期階段提前考慮系統能量消耗的議題，有較大探索空間且有較多機會節省較多的能量消耗。
實驗結果顯示出我們所提出的硬體分割方法與窮盡式演算法得到的結果非常相近。除此之外，我們使用Verilog配合我們使用提出的方法產生的結果在邏輯層次實現數個測試範例，其平均功率消耗的確較原始的設計來得小，結果證明我們提出的方法是有效的。

The advancement of semiconductor process technology enables more and more functions integrated onto a single chip to satisfy the ever increasing appetite of the consumers. Unfortunately, the operating time of such portable systems is limited by the battery capacity that supplies the electricity to the system. The only ways to lengthen the operating time is to either lower system energy consumption or increase the battery capacity. We propose an energy-aware hardware partitioning method at algorithmic level. The energy consumption issue is taken into accounts at the early design stage. The larger solution space can be explored, the greater chances energy consumption can be saved.
The experimental results showed that the best solution found by the proposed method is very close to the solution found by the exhaustive search. We also validate the proposed method with several benchmarks at gate level and their average power consumption is indeed lower than that of their respective original designs.

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