在目前實體設計的學術研究中，關於數位電路自動化的問題已經被探討多年，相關的實體設計自動化工具，也已趨於成熟，並且廣泛的被應用在工業中。然而在類比電路中，電路對許多因素的敏感度很強，像是製程變異、寄生不匹配等等，因此需要考量的問題比數位電路還要複雜許多，導致在佈局上往往必須仰賴於很有經驗的佈局設計者，所以相較於數位電路，類比電路較難發展出自動化的工具。此外，隨著電路逐漸變大，利用人工去規劃電晶體位置，不僅較浪費時間，且很難獲得全域較佳的結果。
近幾年來，有許多類比電路擺置的方法被探討，而這些方法多半針對傳統類比電路限制進行電晶體的擺置。然而有一些類比或是混合訊號的電路會由許多相同的子電路構成，這些多通道的子電路在電路面積上，往往需要有高度的面積使用率，以及特殊的間距匹配考量因素，使得他們可以連續並聯擺置。因此在本論文中，我們提出了一個多通道電路的類比電路擺置方法。由實驗結果顯示，本論文所提出的方法可以提高電路的面積使用率、最小化線長，並且滿足所有使用者所設定之擺置限制。

In the current research of physical design, the problem of digital circuits automation has been explored for many years, and related automation tools are matured and widely used in industry. However, since analog circuits are sensitive to many factors such as process variation, parasitic mismatches, etc., so the problems to be considered are much more complicated than digital circuits. Therefore, an analog layout is often necessary to rely on experienced layout designers and difficult to develop an automated tool compared to digital circuits. Further, as the circuits become larger, manually planning the position of the devices is not only a waste of time but also difficult to obtain a better global result.
In recent years, many placement methods for analog circuits have been studied, and most of these works were devoted to traditional placement constraints. However, some analog and mixed-signal circuits are constructed by many identical sub-circuits (e.g., LCD drivers). These identical sub-circuits of a multi-channel circuit require highly efficient usage on silicon area, and special pitch-match considerations such that they can be placed in parallel. Hence, this thesis proposes an analog placement methodology for multi-channel circuits. The experimental results show that our methodology can increase the area utilization, minimize wirelength, and satisfy all user-specified placement constraints.

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