隨著半導體製程的進步，複雜電路的測試資料量大幅增加的問題已經成為非常重要的議題。在本篇論文中，我們發展了一個以近幾年被提出的輸出響應選擇方法為基礎的嶄新演算法來達到輸出響應資料壓縮的目的，此技術主要的想法是利用電路中的錯誤常常可經由一個以上的輸出埠所觀察到，因此我們只需透過適當的選擇機制，在每個測試時脈週期內選擇少部分的錯誤響應資料觀察，即可以達到完全的錯誤涵蓋率以及輸出響應資料量壓縮的目的。
我們所提出的輸出選擇演算法可以支援兩種硬體架構，這兩種架構主要是由數個累加器/計數器與多工器組合而成，所以需要的控制電路非常的簡單。由於直接觀察輸出響應，所以不會有失真的問題發生而且可以很容易的處理不確定值問題。我們在設計演算法同時也考慮了控制訊號共享的機制並且應用了靜態測試向量壓縮方法來降低測試資料量。
實驗結果顯示，對於ISCAS89及ITC99的標準測試電路而言，平均僅需要觀察7.63%和7.78%的輸出響應資料即可以達到完整的錯誤涵蓋率。

Large test volume resulted from the advanced semiconductor manufacturing has become a significant problem in the past years. In this thesis, we propose a test scheme based on a novel concept called output selection for achieving test response compaction. The basic idea is that since faults are usually detected by more than one output ports, we can achieve complete fault coverage and test response compaction through directly selecting a subset of output responses for observation. Due to there is no xor-based compactors or feedback configurations involved, aliasing and unknown value problems can be easily dealt with. Efficient selection algorithms are developed to determine how to select the necessary output responses for observation according to the control of the proposed selection logics which consist of numbers of accumulators/counters and multiplexers. Control data sharing and a static test set compaction process are also taken into consideration in the selection algorithms so as to minimize the required test data volume.
Experimental results show that in average observing only 7.63% and 7.78% test responses are enough to detect all detectable faults on ISCAS89 and ITC99 benchmarks respectively.

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