積層式的變阻元件能提供小尺寸、低電壓及高尖端電流能力，正符合現在電子設備的需求。氧化鋅基變阻器由於有絕佳的非線性電阻特性,因此是目前變阻器的主流材料,由於變阻特性主要受材料內部微結構影響,能產生大量晶界且均勻一致的晶粒才能提高元件的可靠性,此外氧化鋅是半導性材料，因此需要有元件外層共燒或燒附電鍍抵擋層來防止電鍍製程的鍍層鍍到氧化鋅表面而影響元件特性,並可抵檔環境的化學物質經由晶界腐蝕,影響元件特性。本研究首先了解晶界及晶粒數目對電性影響,之後透過不同熱處理產生的保護層了解積層氧化鋅壓敏電阻元件微結構及電性之影響,最後提出如何維持大量晶界且均勻一致晶粒的可行方法。論文第一部份先探討不同積層厚度對積層氧化鋅變阻元件之微結構及電性影響，第二部探討後燒低溫燒結的磷酸鋅(Znic phosphate) 保護層，探討後燒製程對元件的特性影響；第三部探討高溫共燒 (Zn0.9Mg0.1)TiO3 (ZMT)保護層，探討共燒製程對元件的特性影響；第四部份改採氧化鋁束縛層來當保護層，探討束縛燒結製程對元件的特性影響;。
在第一部分中探討不同積層厚度對積層氧化鋅變阻元件之微結構及電性影響。製作12 和 24 微米兩種介電層厚度的的積層氧化鋅變阻元件，在燒結溫度從 900 到 1000 ℃, 持溫時間 2 小時下觀察兩內電極層間晶粒大小及晶界數目對元件特性的影響, 實驗結果顯示晶粒大小與燒結溫度成線性關係, 因此造成電容值也隨燒結溫度線性增加；相反的兩內電極間的晶界數目隨燒結溫度而線性減小,因此造成崩潰電壓(Breakdown voltage)、漏電流(Leakage current)和非線性係數(Nonlinear coefficient,α)的降低。最佳的燒結溫度在950℃。
在第二部分，探討元件外層磷化鋅保護層當電鍍抵擋層，藉由添加Ma, Ca元素在轉換溶液中浸漬並煅燒來形成來了解對保護層磷化鋅的化性及表面形貌影響。結果顯示添加鎂和鈣元素的磷化鋅保護層其晶粒縱橫比有明顯降低，再者可增加保護層表面緻密、平坦及阻抗性，還會造成電容值及非線性係數值增加，而隨著煅燒溫度升高，消散係數和崩潰電壓會稍微降低。而隨煅燒溫度提高會造成電容值的上升是由於富含有Bi2O3的晶界再結晶及氧空缺的減少所造成。
在第三部分，採用高溫共燒 (Zn0.9Mg0.1)TiO3 (ZMT) 當成保護層，ZMT 是常用的電容材料，結果顯示與 ZnO 共燒相容性好，呈現異向性的緻密，沒有分層剝離的現象；由於已知微結構與電性息息相關，因此 ZMT 層的共燒會影響變阻器的微結構，晶粒大小會從 4 降到 2.7 μm，原因是ZMT層會在燒結過程中扮演燒結抑制層，同時晶粒尺寸降低會造成電容值降低而崩潰電壓降低，另外觀察到共燒 ZMT 後的非線性係數及漏電流都降低，這結果與 I-V curve 斜率改變有關，因為生成了 Zn2TiO4 半導相，因為在燒結過程中，電鍍抵擋層的鈦原子擴散進 ZnO 基材。
在第四部分，改採氧化鋁束縛層來當保護層，探討束縛燒結製程對元件的特性影響; 已知材料微結構越均勻，元件特性越好。束縛燒結是採用在堆疊製程時上下最外層都疊壓一層燒結抑制層，燒結抑制層是選不跟元件起反應性的硼矽玻璃加90重量百分比的三氧化二鋁製成的生胚，結果燒後的晶粒尺寸變小且分佈也變均勻，因為無壓抑制燒結的抑制層與元件與接合面上形成一X-Y面上的拉伸應力，此應力造成降低介電材料在X-Y方向的緻密速率，因此X-Y收縮被抑制，收縮主要都發生在Z軸。元件特性也較自由燒結好，因為材料微結構變均勻，漏電流變小而非線性係數(Nonlinear coefficient,α)變大， 因此由尖端電流的量測可知元件的能量吸收能力提高。

Multilayer varistors (MLVs) that have the advantage of a small size, low voltage, and high peak current (PC) capability can fully meet the requirements of electronic equipments. Zinc oxide varistor has become important protection components because of its exceptional non-linear ohmic characteristic. The electrical properties of varistor are associated with microstructure. Thus, many efforts are put on controlling the quantity of grain boundary and homogeneous grain size for better electrical properties. Due to ZnO’s semi-conductive characteristic, a passivation layer needs to be selectively fired on the exposed surface of ZnO-based varistor to prevent over-plating on ZnO surface during the conventional plating process. Moreover, withstand the possible etching through grain boundaries when post application. Therefore, in this dissertation, we study the influence of quantity of grain boundary and grain size on electrical properties. In addition, study the effect of thermal processes on microstructure and properties of ZnO-based multilayer varistor with 3 kinds of passivation layers. Then, propose a better method for having small and homogeneous grain size for better electrical properties.
In the first part, ZnO-based multilayer varistor (MLV) with two different dielectric layers (12 and 24 μm) are sintered from 900 to 1000 ℃ for 2 hours. The results show that the grain size linearly increases with sintering temperature, which results in an increase in the capacitance of ZnO-based MLVs. In contrast, the number of grain boundaries between two adjourn electrodes linearly decreases with sintering temperature associated with a decrease in breakdown voltage, leakage current and nonlinear coefficient of ZnO-based MLVs. The energy absorption capabilities determined from the peak current (PC) measurements of ZnO-based MLVs with sintering temperature are reported. The optimum peak currents of ZnO-based MLVs can be obtained by sintering at 950℃.
In the second part, The chemical and morphological modification of zinc phosphates as a protection layer for ZnO-based varistor has been made through the addition of Mg or Ca species to the conversion solution combined with the calcinations of zinc phosphates. The results showed that the aspect ratio of as-coated zinc phosphates grains can be greatly reduced through the addition of Mg or Ca species. Moreover, the introduction of calcination to zinc phosphate not only makes the coating layer more dense, smooth, and resistive, but also results in the increase in capacitance, non-linear coefficient (α). On the other hand, loss tangent and breakdown voltage are both slightly decreased with increasing calcination temperatures.
In the third part, cofiring (Zn0.9Mg0.1)TiO3 (ZMT) as passivation layer is investigated. A semi-conducting ZnO-based multilayer varistor (MLV) is cofired with a passivation layer with ZMT composition to prevent ZnO-based MLV from over-plating during plating process. The cofiring results show that no de-lamination between ZMT and ZnO can be found; suggesting good co-firing compatibility between ZMT and ZnO though the anisotropic densification of ZMT is noted. However, the microstructure and electrical properties of ZnO based MLV is greatly influenced since ZMT is cofired with ZnO-based MLV. Reduction of grain size of ZnO-based MLV from 4 to 2.7 μm that is presumably attributed to constraining sintering of ZnO-based MLV by ZMT is observed after cofring ZMT. Simultaneously, the reduction of grain size of ZMT covered ZnO-based MLV results in a decrease of capacitance and in an increase of breakdown voltage. On the other hand, a decrease of non-linear coefficient and an increase of leakage current of ZMT covered ZnO-based MLV are observed as well. The results are associated with the change of slope of I–V curve for ZMT covered ZnO-based MLV due to the formation of a semi-conducting Zn2TiO4 phase, which is resulted from the diffusion of titanium ion into the matrix of ZnO-based MLV during co-firing.
In the forth part, Al2O3-based constrained layers as passivation layers are investigated. The result showed that performance of a ZnO-based multilayer varistor is affected strongly by the homogeneity of its microstructure. A homogeneous microstructure of a ZnO-based multilayer varistor is attained by using constrained sintering, when nonreactive borosilicate glass + 90 wt% alumina (Al2O3) was used as the constraining layer laminated on both sides of the multilayer ZnO-based multilayer varistor (MLV). The mean grain size and the distribution of grain size of a ZnO-based MLV fired by constrained sintering are both reduced, because an in-plane tensile stress results from constrained sintering in the x–y plane of the multilayer device, which could modify the densification rate of the ZnO-based MLV materials. The leakage current and nonlinear coefficient (α) of ZnO-based MLVs can be greatly improved due to the inhibition of ZnO grain growth when constrained sintering was used instead of free sintering. Note that the energy absorption capabilities in terms of peak current (PC) measurements of ZnO-based MLVs fired by constrained sintering are remarkably improved due to a homogeneous microstructure.

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