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研究生： 陳乃睿
Chen, Nai-Ruei
論文名稱： 具低輸出電壓之高降壓直流-直流轉換器研製
Implementation of High-Step-Down DC-DC Converter with Low Output Voltage
指導教授： 陳建富
Chen, Jiann-Fuh
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2019
畢業學年度： 107
語文別： 英文
論文頁數： 65
中文關鍵詞： 高降壓比 、低輸出電壓 、零電壓切換
外文關鍵詞： High step-down ratio, Low output voltage, Zero-voltage-switching (ZVS)
相關次數： 點閱：94  下載：10 
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    • 在數據中心的配電中，將傳統的輸入電壓12伏特提升至48伏特，隨著電壓的提升可以有效的減少輸入電流，進而減少導通損失。然而，微處理器的工作電壓為1.X伏特系列。此時傳統的降壓電路無法提供足夠的降壓比，因而傳統需要兩級的轉換，若能以一具有高降壓比的轉換器完成將有效的減少轉換損失。對此，本文提出一架構是結合耦合電感以及交錯式電路的優點來達成高降壓比。在提出的架構中使用五個開關，其中四個於開關切換時，耦合電感之漏感會與開關上之寄生電容諧振，使開關達到零電壓切換，以減少開關的切換損失。本文對所提出之架構的動作原理、穩態分析以及元件參數設計進行詳細的介紹，並且利用軟體SIMPLIS來驗證提出之架構的可行性。
    最後，根據本文所提出的設計流程，研製一規格為輸入電壓48伏特、輸出電壓1伏特以及滿載功率30瓦特的電路，對本文所提出的拓樸去實行與驗證其特性。

    In the power distribution of the data center, the conventional input voltage of 12 V is raised to 48 V, which can effectively reduce the input current and reduce conduction loss. However, the operating voltage of microprocessor is around 1 V. Meanwhile, the conventional step-down circuit cannot provide a sufficient step-down ratio, so a high step-down voltage converter is needed. In this thesis, combing the advantages of coupled inductors and interleaved circuits, a high step-down converter is proposed. Moreover, parasitic capacitance of four switches resonate with the leakage inductance of the coupled inductor and therefore can turned on with zero-voltage-switching, which can ameliorate the efficiency of the converter. In this thesis, steady-state analysis, principle of operation, and design of component parameters of the proposed converter are described and the software SIMPLIS is used to verify the feasibility of the proposed converter.
    Finally, a prototype circuit with input voltage of 48 V, output voltage of 1 V and output power of 30 W is developed to implement and verify performance of the proposed topology in this thesis.

    摘要……………………………………………………………………………………………………………I Abstract…………………………………………………………………………………………………II Acknowledgement………………………………………………………………………………III Contents…………………………………………………………………………………………………IV List of Table……………………………………………………………………………………VI List of Figure…………………………………………………………………………………VII CHAPTER 1 INTRODUCTION ………1 1.1 Background and Motivation ………1 1.2 Thesis Outline ………4 CHAPTER 2 REVIEW OF TOPOLOGIES ………5 2.1 Non-Isolated Converter ………5 2.1.1 Buck Converter ………5 2.1.2 Interleaved Buck Converter ………7 2.1.3 Cascade Buck Converter ………10 2.1.4 Coupled-Inductor Buck Converter ………11 2.1.5 Switched-Capacitor Buck Converter ………14 2.2 Isolated Converter ………15 2.2.1 Flyback Converter ………15 2.2.2 Forward Converter ………16 2.2.3 Half-Bridge Converter ………18 2.3 Summary ………19 CHAPTER 3 ANALYSIS OF PROPOSED CONVERTER ………22 3.1 The Proposed Converter ………22 3.2 Operating Principle ………24 3.3 Steady State Analysis ………31 3.3.1 Derivation of Voltage Conversion Ratio ………31 3.3.2 Design Considerations of the Coupled Inductors ………35 CHAPTER 4 PARAMETERS DESIGN AND EXPERIMENTAL RESULTS ………38 4.1 Parameters Design of Components ………38 4.1.1 Duty Cycle ………38 4.1.2 The Magnetizing Inductances Lm1 and Lm2 ………39 4.1.3 The Capacitor C1 and Capacitor C2 ………42 4.1.4 The Output Capacitor Co ………44 4.1.5 The Switches S1, S2, S3, S4, and S5 ………44 4.2 Simulation Results ………46 4.3 Experimental Results ………50 4.3.1 Experimental Waveforms ………51 4.3.2 Efficicency of the Proposed Converter ………59 CHAPTER 5 CONCLUSIONS AND FUTURE WORKS ………60 5.1 Conclusions ………60 5.2 Future Works ………61 REFERENCES……………………………………………………………………………62

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