低溫多晶矽製程電路整合於主動式液晶顯示器是目前面板設計的主流趨勢。然而製程環境上的差異會造成元件特性如臨界電壓產生變異，進而影響到驅動電路的穩定度，並造成顯示器畫面的品質下降。因此本論文將提出三個不受低溫多晶矽元件特性變異所影響的驅動電路架構，並以模擬分析電路之特性。
本論文首先針對低溫多晶矽薄膜電晶體進行電晶體特性曲線的量測，利用量測結果輔以模擬軟體進行模組化匹配驗證設計之電路的可靠性。第一個電路是本實驗室先前所提出之源極隨耦器型類比緩衝電路。由模擬結果顯示，此電路的輸入輸出誤差在 0.12 V以內；而以臨界電壓變異範圍在 0.33 V的蒙地卡羅分析中，產生的誤差在 0.16 V以內。此外，本論文針對電路之模擬結果分析其非理想效應，並歸納出可能造成誤差的四個因素，藉由適當調變電路中之耦合電容值及電晶體寬長比，更進一步驗證電路的穩定度。第二個電路則為一個新式自我補償之源極隨耦器電路。此電路利用主動負載將補償電壓紀錄在驅動電晶體之閘極端，並消除輸出端的次臨界電流現象。由模擬結果可發現，新式架構的驅動電晶體閘極端不會產生電荷累積的情形，而最大輸入輸出誤差為 0.16 V；而蒙地卡羅分析所得到最大的誤差電壓為 0.25 V。第三個電路則應用於低功耗面板設計之共電極驅動電路，此電路以精簡的架構設計避免多餘的功率消耗及佈局負擔。由模擬結果可發現此電路於操作階段不會產生靜態電流，可確保電路的低功率消耗。另一方面，針對線反轉及點反轉電路架構的驅動能力模擬檢測可發現線反轉架構在 20 pF到 200 pF的負載下操作時，最差的輸出電壓誤差為 0.06 V，而點反轉架構則可改善至 0.08 V以下。

Implementing circuit systems on the active matrix liquid crystal display (AMLCD) using low-temperature poly-silicon thin-film transistors (LTPS TFTs) has become a dominant trend in recent years. However, the variations of TFT electrical characteristics caused by the errors of fabrication processes might influence the stability of driver circuits. This defect might deteriorate the video quality of the display. The work proposes three driver circuits for flat panel display which are immune to the characteristic variations of LTPS TFTs. The feasibility of the proposed circuits will be verified through simulation and analysis.
In this work, the electrical characteristics of the LTPS TFTs are measured for SPICE modeling to verify the effectiveness and reliability of the proposed circuits. The first proposed circuit is the source follower type analog buffer as announced by our laboratory. The simulation results show that the offset voltages are distributed within 0.12 V, and within 0.16 V in the worst case of Monte Carlo analysis, where the threshold voltage variation of LTPS TFT is set to 0.33 V. Additionally , the non-ideal factors generating error output of this circuit during operation are analyzed, and four main factors are concluded. Finally, the output error can be reduced by properly modulating the size of the coupling capacitor and the size of the specific transistor. The second proposed circuit is a source follower type analog buffer using a new self-compensating method. In this circuit, the active load is applied to the gate of the driving TFT for memorizing compensated voltage, and to the source of the driving TFT for eliminating the sub-threshold current. From the simulation, the gate voltages remain steady during the whole output period. The offset voltages are distributed within 0.16 V, and within 0.25 V in the worst case of Monte Carlo analysis. The third proposed circuit is a common electrode driving circuit design for a low-power panel system. The simple circuit structure has the advantages of maintaining low power consumption during the operating period and saving layout area. The simulation results show that no steady current is generated in this circuit during operation. Therefore, the circuit is able to be applied to low-power panel design. The performance of this circuit is investigated by simulating the driving capability on a 3•3 pixel array. The line inversion scheme performs an offset error below 0.06 V with capacitance loading varied from 20 pF to 200 pF, and the dot inversion scheme can perform an offset error below 0.08 V after optimization of circuit parameters.

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