本論文提出一個基於邊緣強化超解析度演算法。此演算法可分為邊緣強化內插法與高頻增強兩個部份，而內插法的部份又可以再區分為對角線與水平垂直內插兩個步驟。在第一步驟中，先針對對角線上未知的像素進行內插，藉由分辨邊緣方向預先決定使用的參考像素與是否參考鄰近像素梯度值。至於沒有被填滿的像素，則會在第二步驟中，依同樣預先決定的方法估算。在兩個步驟中，使用衰減函數，以避免混疊效應，再加上增強高頻部分，來還原高解析度影像。實驗結果顯示，使用此演算法之峰值訊號雜訊比可達到平均值為28.448 dB，而其結構相似度平均值可達到0.8740。此外，本論文亦提出硬體架構，將演算法實現在Altera的FPGA板上，共使用約6千個邏輯元件，運作速度達到216 MHz。

In this thesis, an edge-enhanced super resolution algorithm is proposed. The algorithm consists of two major parts, edge-enhanced interpolation, and high frequency enhancement. The interpolation method can be further separated into two steps. In the first step, the unknown pixels in the diagonal direction are first classified into with and without edge which will deal with an early skipped interpolation and a strict interpolation method, respectively. In the second step, horizontal or vertical interpolation method is adopted to fill up the reminding pixels in horizontal or vertical direction. After interpolations, a high frequency enhancement method with a degradation function is finally applied to avoid the aliasing effect and enhancing the high frequency region. Moreover, a hardware architecture is designed for the proposed algorithm to reduce execution time. Experimental results shows that the proposed algorithm achieves 28.448 dB in the average PSNR and 0.8740 in the average SSIM. Besides, the VLSI architecture can achieve 216 MHz with 6.2 k logic elements on Altera FPGA.

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