本論文使TSMC 0.25mm CMOS製程研製應用於IEEE 802.11b/g WLAN之2.4GHz超外差式接收機RFICs，設計之CMOS RFICs包括：低雜訊放大器(LNA)、混頻器(mixer)、收發切換開關(T/R switch)及壓控振盪器(VCO)。RFIC晶片採用打鎊線(bond-wire)至PCB上進行量測，並加入filter等被動元件以及頻率合成器作整合量測。2.4GHz超外差接收機(中頻374MHz)整合特性量測結果如下：增益約18.15dB，雜訊指數約9.53dB、input P1dB約-20dBm、OIP3約-4.37dBm，整體接收機之鏡像訊號抑制約70dB，不含頻率合成器之接收機功率消耗約為35mW；VCO量測輸出頻率由2009MHz~2116MHz、相位雜訊為-99.7dBc/Hz@100kHz；頻率合成器量測突波大小為-66.6dBc，切換時間在頻道跳躍10MHz頻率時約為23.4ms。數位調變量測方面，802.11b DSSS (CCK)在11Mbps下量測接收訊號之EVM值為7.2%及802.11g OFDM(64-QAM)在54Mbps下測得的EVM值為3.7%。
論文的另一部分是探討2.4GHz雙降頻式接收機架構，設計與量測之電路包括：鏡像拒斥低雜訊放大器(image-reject LNA)與切換電容調整式壓控振盪器(VCO with switched capacitor tuning)，電路採用TSMC 0.18mm製程設計製作。Image-reject LNA量測增益為13dB、雜訊指數量測為2.4dB、IIP3約-2.5dBm、image-reject有21dB衰減效果；VCO量測頻率切換開關在B1=L、B0=H與控制電壓由0V~1.8V情況下，輸出頻率由1589MHz ~ 1664MHz，相位雜訊為-102.6dBc/Hz@100kHz。又本論文並研製一全積體化2.4/5.7GHz同時共用雙頻帶CMOS低雜訊放大器(列於附錄)，量測結果：在2.44GHz增益為7.61dB，雜訊指數為5.66dB; 在5.76GHz增益為8.58dB，雜訊指數為6.8dB。

This thesis presents the development of CMOS RFICs for an IEEE 802.11b/g receiver front-end in a TSMC 0.25mm CMOS process. The 2.4GHz heterodyne CMOS RF receiver includes a LNA, mixer, T/R switch, and quaduature VCO. The RF is from 2.4 to 2.483 GHz and the IF is at 374 MHz. The quadrature VCO has an output frequency from 2009 to 2116MHz with -99.7dBc/Hz @100KHz phase noise. The CMOS VCO is used in a designed 2-GHz frequency synthesizer. The synthesizer with a spur below 66dBc has a settling time of 23.4ms for 10MHz step. The CMOS RF receiver (with the frequency synthesizer) exhibits a conversion gain of 18.15dB, noise figure of 9.53dB, input P1dB of -20dBm, OIP3 of -4.37dBm, and image rejection of 70dB. The power consumption of the CMOS receiver (without the frequency synthesizer) is 37mW at VDD = 2.5 V. For the digital modulation measurement, a 2412MHz 802.11b 11Mbps CCK and 802.11g 54Mbps OFDM signal are applied to the receiver. The measured EVM is about 7.2%(CCK) and 3.7%(OFDM).
The other part of the thesis is the development of an image-reject CMOS LNA and a CMOS VCO with switched capacitor tuning for a 2.4GHz dual-conversion receiver in a TSMC 0.18 mm CMOS process. The LNA exhibits a noise figure of 2.4dB, linear gain of 13dB, IIP3 of -2.5dBm, and image rejection of 21dB. The VCO has an output frequency from 1589 to 1664MHz with -102.2dBc/Hz@100kHz phase noise (at the switch condition of B1=L and B0=H). Also a fully integrated 2.4/5.7GHz concurrent dual-band 0.18-mm CMOS LNA is presented in the appendix. The dual-band LNA exhibits a linear gain of 7.61dB and noise figure of 5.66dB at 2.44GHz, and a linear gain of 8.58dB and noise figure of 6.8dB at 5.76GHz.

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