為了因應系統單晶片高度整合的需求，使用低成本內嵌式震盪器來提供系統所需的參考時脈日益重要。本論文提出兩種內嵌式振盪器設計，除了具有小面積與低功率消耗的特性外，如何在製程、電源電壓、溫度漂移下保持輸出頻率的穩定性，以及如何使設計能隨製程演進得到好處是本研究主要的設計目標。第一個設計是具有平均電壓反饋技巧的參考震盪器，量測結果顯示在合理的製程、電源電壓、溫度變動下，輸出震盪頻率漂移都在±1%以內。在第二個設計中，我們進一步的改進之前的設計，使其適合於先進的製程技術，佈局後模擬結果顯示在合理的製程、電源電壓、溫度變動下，輸出震盪頻率漂移可以維持在±0.5%以內。

Due to the high integration trend in a system-on-chip (SoC), using on-chip reference oscillator to provide the reference frequency for a system is getting important today. This thesis proposes two on-chip reference oscillators. In addition to the features of low cost and low power consumption, how to ensure the stability against process, supply voltage and temperature (PVT) variations, and how to make the design more suitable for advanced process technology are the major objectives of this research. The first design employs voltage averaging feedback technique to realize the reference oscillator. Measurement results show that the frequency variations are all within ±1% for the given PVT variations. The second design further improves the preceding design and makes it more suitable to advanced process technology. Post-layout simulation results show that the frequency variations are all within ±0.5% for the given PVT variations.

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