本論文提出一套基於電子系統層級設計流程，在軟硬體切割後採用QEMUCoWare全系統設計與模擬之效能分析架構。由於在此模擬環境中軟硬體是以不同模擬程式與精確度進行模擬，所以只能驗證功能而無法做有效地軟硬體效能分析。然而應用程式、驅動程式與硬體之間的整合程度，往往對整個平台效能有很大的影響。因此我們建立了一個軟硬體同步效能分析的機制，讓使用者可以透過高速軟體模擬功能進行軟硬體協同設計之外，還可透過此同步機制完成軟硬體效能分析，透過分析結果可以推估應用程式驅動程式與硬體之間的合作情況，再由這些分析數據微調軟硬體配置，以期在平台開發初期就能達到極高的軟硬體整合程度。
我們以 ARM 嵌入式系統做為欲模擬的平台環境。透過QEMU 模擬的ARM系統來啟動Linux 作業系統，並且經由修改QEMU 的CPU 模擬器以達到軟體效能分析的效果。然而QEMU 是無時序概念的，因此無法從QEMU 中得到精確的執行週期，只能達到執行指令數精確，所以我們在QEMU 與CoWare 之間設計同步器，透過此同步器分別截取QEMU 所計算的軟體指令執行數與CoWare 內模擬硬體執行週期，提供使用者軟硬體執行相對時間以利實現效能分析。

In this thesis, we propose an architecture binding full system simulation and hardware-software synchronization profiling using QEMU and CoWare based on electronic system level design. We can use it not only to do hardware-software co-design but also to analyze the hardware-software integration which can affect the system performance greatly. Due to the different simulation accuracy and simulator between CoWare and QEMU in our full system simulation platform, we can hardly realize the timing information among CPU and other peripherals simulated in CoWare. In order to conquer this problem, we develop a synchronization method and apply it to full system
simulation. It can not only keep the simulation speed but also provide the simple timing information between CPU and the hardware under developing.
We use ARM embedded system as our simulation environment and design the synchronizer to fetch the timing information between the hardware modules modeled in CoWare and the software system run in QEMU. And then we can use the information to achieve synchronization profiling for performance evaluation of the specific hardware-software partition. We then can consider whether to redo the hardware-software partition according to the performance results.

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