由於有限脈衝響應數位濾波器在數位信號處理領域的廣泛應用，擁有高速低成本的有限脈衝響應數位濾波器架構便成為一種強烈的需求，並且也有許多的架構被提出來。在這些眾多架構中，若從位元階層來分，可以分為位元循序(bit-serial)，位元平行(bit-parallel)，位元組循序(digit-serial)等。其中位元循序的用意，是以時間換取硬體成本，因此適合中低速的應用。位元平行，雖然硬體成本較大，卻很適合高速的應用。位元組循序，則是介於以上兩者之間，適合中等速度的應用。在不同的應用中，需要採用不同的架構，甚至需要發明新的架構以因應。
本論文提出一個架構，在位元階層上，其輸入信號為位元循序，因此在做乘法時，可以簡化乘法為一個選取濾波器係數或零的多工器，使得整個濾波器的運算，變成一些濾波器係數的連加，如此可以大大地減少硬體成本，比起基於基底四布斯(Radix-4 Booth)演算法做乘法的架構，更加節省硬體。此外，利用管線技術以及再排時(Retiming)技術的情形下，可以進一步地減少本架構臨界路徑(critical path)的信號傳遞時間，如此可使本架構達到很高的工作頻率。
本論文所提出的架構，不僅在硬體成本方面節省，也可以在很高的頻率下工作，尤其在濾波器的信號位元數增加，或濾波器長度增加的情形下，仍然保持其優點，所以是一個適用性很廣的架構。

Since FIR filters have a wide variety of applications in the field of digital signal processing, a high-speed low-cost architecture of FIR filters is strongly required and many architectures have been proposed. Among these architectures, they are categorized into bit-serial, bit-parallel, and digit-serial in the level of bits. The intention of bit-serial is to trade time for hardware cost and suitable for medium and low speed applications. Although bit-parallel needs high hardware cost, it is however suitable for high speed applications. Digit-serial owns the property between these two schemes and is fit for medium speed applications. In different cases of applications, we need to adopt different architectures and even need to invent a new architecture to achieve the goal.
This paper proposes an architecture whose input signal is bit-serial in the level of bits. Hence, the operation of multiply is reduced to a mux of selecting fiter coefficients and zeros. This makes the whole operations of the filter become the additions of fiter coefficients, therefore the great reduction of hardware cost. This architecture saves more hardware cost than radix-4 booth based architecture. In addition, we take advantage of retiming to further reduce the propagation delay in the critical path of this architecture. This processing makes our architecture achieve a very high working frequency.
The proposed architecture not only saves hardware cost but also works in a very high working frequency. Especially when the bit number of filter signal or the length of filter increases, this architecture still keeps its strengths. Therefore, the proposed architecture has a wide range of applications.

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