| 研究生: |
劉㦤婷 Liou, Yi-Ting |
|---|---|
| 論文名稱: |
具適應性電壓準位之非反向升-降壓型直流-直流轉換器 A Non-Inverting Buck-Boost DC-DC Converter with Adaptive Voltage Positioning Mechanism |
| 指導教授: |
魏嘉玲
Wei, Chia-Ling |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2020 |
| 畢業學年度: | 108 |
| 語文別: | 中文 |
| 論文頁數: | 114 |
| 中文關鍵詞: | 升壓-降壓型轉換器 、主動式電壓降控制 、適應性電壓準位 、差動差分放大器 |
| 外文關鍵詞: | Buck-Boost Converter, Active-Droop Control, Adaptive Voltage Positioning (AVP), Differential Difference Amplifier (DDA) |
| 相關次數: | 點閱:165 下載:0 |
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近年來可攜式電子產品蓬勃發展,在電池容量沒有顯著成長的情況下,如何延長電子產品的使用時間成為一個重要的議題,此外,隨著製程的演進,單一晶片中整合越來越多的電晶體,逐漸降低的操作電壓面臨著越來越大的操作電流,如何使暫態反應時的電壓變動仍維持於可接受範圍也成為另一個挑戰。
針對這兩個問題,本系統提出一具適應性電壓準位之非反向升壓-降壓型直流-直流轉換器,透過主動式電壓降控制來實現適應性電壓準位,完整利用電池所提供的電壓範圍來供給後端電路使用,藉由小訊號模型分析來確保系統穩定度並達到定常數輸出阻抗,有別於傳統主動式電壓降控制需要額外的減法器電路,本研究以差動差分放大器同時實現減法器與補償器電路,並將補償網路內建於晶片內,降低電路成本並提高效率。
本晶片使用台灣積體電路公司0.35μm 2P4M 5V混合訊號製程,晶片大小約為4mm^2,當輸入為2.5V至5V且負載電流為50mA至350mA時,輸出電壓均可穩定於3.3V,最高效能可達95.57%。
Nowadays, portable devices have been developed rapidly. Given the battery capacity does not have an obviously improvement, how to extend the operational time of these devices becomes an important issue. With the advancement of processing technologies, more transistors are integrated to achieve fast calculation speed and multiple functions. The static current increases significantly while the operational voltage gets lower. Therefore, maintaining the output voltage in the acceptable range during load transient is another stringent challenge.
In this thesis, a non-inverting buck-boost DC-DC converter with adaptive voltage positioning (AVP) is proposed based on active-droop control method. The analysis of small-signal model is discussed to ensure the stability and constant output impedance is achieved to improve the transient response. Moreover, the differential difference amplifier (DDA) is used to realize a subtractor and a compensator simultaneously. The compensate network is on chip which also makes the converter lower cost and more efficiency.
The chip is fabricated by using TSMC 0.35 μm 2P4M 5 V mixed-signal process, and the chip size is about 4 mm2. The input voltage ranges from 2.5 to 5 V, the output voltage is regulated at 3.3 V, and the load current ranges from 50 to 350 mA. The measured maximal efficiency is 95.57 %.
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