本論文所提之漣波模式降壓轉換器改善電壓穩定度、直流調節、切換頻率，暫態時實現步階負載的時間最佳化控制。降壓轉換器分別使用三種電路做改善，自適應截止時間產生器抑制非理想切換頻率變動；自動電壓準位偏移修正微分器產生額外訊號改善脈波爆裂現象與截止時間造成的電壓偏移訊號；暫態加速電路在變載後即時偵測截止時間之脈寬訊號取代類比的波峰/波谷偵測電路，將其轉換為時間最佳化控制。
本研究分別使用PCB電路搭配FPGA開發版與TSMC 0.35μm製程晶片驗證此降壓轉換器的功能。功率級輸入電壓為3.8V提供低漣波輸出電壓為1.4V，在負載變動為160-740mA下其切換頻率變動範圍限縮至850-870kHz且輸出電壓偏移小於10mV，下衝及過衝電壓分別減少至60mV及125mV，上升及下降時間分別縮短至2.9μs及4.3μs之內。

This research improves the control of a ripple-based buck converter for steady-state stability, output voltage regulation, constant switching frequency, and load transient response using the time optimal control (TOC). Three functional circuits are applied to the buck converter to achieve these goals. The adaptive off-time generator suppresses the nonideal variation in switch-ing frequency. The voltage offset auto-correction differentiator can generate additional signals to avoid pulse bursting phenomenon and mitigate DC offset caused by the off-time control. The transient enhanced circuit detects immediate pulse width of the off-time control signal to achieve time optimal control.
The circuit validation was made by PCB power stage with the FPGA control. The taped-out chip was manufactured by the TSMC 0.35 μm CMOS process as well. The testing results show that the proposed Buck converter provides low ripple output voltage of 1.4 V from the supply voltage of 3.8 V. Under load current change between 160-740 mA, the switching frequency drift is within the range of 850-870 kHz and the output voltage offset can be limited within 10 mV. The undershoot/overshoot voltage and rising/falling recovery time are reduced to 60/125 mV and 2.9/4.3 μs, respectively.

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