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研究生: 劉智豪
Liu, Chih-Hao
論文名稱: 應用於數位助聽器之符合近似ANSI S1.11規格且低群延遲與低運算量濾波器組設計
Low-Group-Delay and Low-Complexity Algorithm Design of 18-Band Quasi-ANSI S1.11 1/3 Octave Filter Bank for Digital Hearing Aids
指導教授: 雷曉方
Lei, Sheau-Fang
共同指導教授: 賴信志
Lai, Shin-Chi
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2014
畢業學年度: 102
語文別: 中文
論文頁數: 83
中文關鍵詞: ANSI S1.11濾波器組離散餘弦轉換模組數位助聽器
外文關鍵詞: ANSI S1.11, filterbank, discrete cosine transform modulation, digital hearing aids
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  • 本論文提出符合近似ANSI S1.11 class-2規格的18個頻帶濾波器組。所設計之濾波器組具有低群延遲、低運算複雜度、低匹配誤差等特色。相關發展技術可以分為以下幾項: 1) 先使用低通濾波器搭配離散餘弦轉換可以產生9個頻帶的等頻寬濾波器組,再將延遲單元(z-1)置換成全通濾波器,可產生9個頻帶之非等頻寬濾波器組; 2) 將離散餘弦轉換的輸入經過折疊減少其乘法運算量,再推導至遞迴離散餘弦轉換,以降低係數記錄量,最後使低通濾波器的頻譜可以拓展至想要的中心頻率; 3) 透過多速率架構來實現18個頻帶的近似ANSI S1.11 class-2規格(w =2),與最新Liu et al.的文獻比較,本論文每個取樣點雖然增加16%加法,卻能降低66%的乘法,除此之外最大匹配誤差平均為3.05dB,明顯優於最新Wei et al.所提出的方法。由於本論文針對分析濾波器組進行硬體的實現,硬體設計上考量了不同的規格,未來可朝向可組態化發展。整體而言本論文提出的濾波器組設計,具有低群延遲與低運算量,在未來能實際應用在助聽輔具。

    This thesis presents a novel algorithm and architecture design for 18-band quasi-class-2 ANSI S1.11 1/3 octave filterbank. The developing technique of this thesis is summarized as follows: 1) a simple low-pass filter (LPF) and discrete cosine transform modulation are utilized to generate a uniform 9-band filterbank first, and then we replace all elements of z-1 by all-pass filters (APF) to obtain the non-uniform filterbank; 2) a fast recursive structure and variable-length algorithm is further developed to efficiently accomplish DCT modulation. Then, the spectrum of LPF can be easily spanned and flexibly extended to the location of the desired central frequency; 3) an 18-band quasi-class-2 filterbank design is finally realized by combining with multi-rate concept and by following up the proposed design steps with parameter determinations. Compared with the latest Liu et al.’s quasi-class-2 ANSI S1.11 design, the proposed method totally has 72.3% reduction for multiplications per sample, 11.25-ms group delay, and 41 additions decreased per sample. The maximum matching error of the proposed method is averagely equal to 2.64 dB much smaller than that of the latest Wei et al.’s 3.75 dB. In implementation, the proposed design can be operated at 27.32 MHz which is easily to achieve 14.616 MHz real-time requirement. Overall, the proposed filterbank design would be a new solution for future applications in the area of hearing aids.

    中文摘要 I ABSTRACT III 誌謝 IX 目錄 XI 表目錄 XV 圖目錄 XVII 第一章 緒論 1 1.1. 研究背景 1 1.2. ANSI S1.11 規格介紹[1] 2 1.3. 近似ANSI S1.11 規格介紹[7] 4 1.4. 研究動機 5 1.5. 論文章節組織 5 第二章 既有演算法分析與介紹 7 2.1. Kuo et al. 所提出之濾波器設計方法[8] 7 2.1.1. 以平行方式設計濾波器組 7 2.1.2. 以多速率架構設計濾波器組 7 2.1.3. 文獻探討 8 2.2. Liu et al. 所提出之濾波器設計方法[9] 9 2.2.1. 演算法介紹 9 2.2.2. 文獻探討 11 第三章 提出低運算量與低群延遲之濾波器組設計演算法 13 3.1. 全通濾波器a值之選定 16 3.2. 低通濾波器之設計 21 3.3. 遞迴離散餘弦轉換長度M值之選定 24 3.4. 輸入訊號的折疊 29 3.4.1 折疊case《1》 30 3.4.2 折疊case《2》 31 3.4.3 折疊case《3》 32 3.4.4 折疊case《4》 33 3.4.5 折疊case《5》與case《7》 34 3.4.6 折疊case《6》與case《8》 37 3.4.7 折疊case《9》 40 3.4.8 折疊case《10》 43 3.4.9 折疊case《11》 45 3.4.10 折疊case《12》 48 3.4.11 case《1》至case《12》之折疊結果與說明 50 3.5. 遞迴離散餘弦轉換推導 51 3.6. 低通濾波器D與I設計 53 第四章 硬體設計與規劃 55 4.1. 硬體規劃與限制 55 4.2. 硬體電路架構 56 4.2.1. 全通濾波器電路架構 58 4.2.2. 低通濾波器電路架構 59 4.2.3. 遞迴離散餘弦轉換電路架構 59 4.3. 硬體時序圖與FPGA電路合成結果 62 第五章 匹配誤差策略與實驗結果 65 第六章 運算量計算與相關文獻分析比較 71 6.1. 乘法運算量計算 71 6.2. 加法運算量計算 72 6.3. 群延遲計算 73 6.4. 相關文獻分析比較 73 6.4.1 匹配誤差比較 74 6.4.2 Multi-M與Sole-M比較 75 6.4.3 運算量與群延遲比較 76 6.4.4 硬體數據比較 77 6.4.5 綜合性論述 80 第七章 結論與未來展望 81 參考文獻 82

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