本論文為應用於2.4 GHz ISM-band之射頻前端接收機子電路設計，設計內容一共分為兩部分：第一部分為2.4 GHz低雜訊放大器的設計與探討新型蜂巢電感在放大器的電磁干擾抑制效應，第二部分為2.4 GHz寬頻電流再利用架構壓控振盪器。所設計的電路皆使用TSMC 0.18-μm CMOS 製程實現，操作電壓為1.8 V。
2.4 GHz低雜訊放大器的設計為提升整體增益並且降低雜訊指數，採用了三級放大器串級的架構，高增益的特性使得電路的穩定性成為了設計考量的重點，在輸出級的部分，以串音耦合所搭建的訊號路徑將輸出訊號回授至輸入端，由此以最直接的方式測試當電感元件之間因串音耦合形成干擾時電路的穩定度變化。量測結果顯示，具抑制電磁干擾之蜂巢電感所建立的串音耦合回授路徑因其特殊的元件佈局方式，可將大部分的回授訊號進行抑制，電路因而維持穩定狀態，並且擁有35.7 dB的增益與3.3 dB的雜訊指數；相反地，作為對照組的傳統八角形電感的串音現象將高強度的訊號回授至輸入端，使放大器不穩定，最終導致電路發生振盪。蜂巢電感串音現象testkey在2.4 GHz的操作頻率下的量測結果為-49.565 dB，而傳統八角電感為-27.6 dB，驗證蜂巢型電感比起傳統電感能夠有超過21 dB的電磁干擾抑制能力。
在2.4 GHz壓控振盪器的設計採用了電流再利用架構以減少消耗功率，並且使用混合式電阻偏壓來改善輸出擺幅不對稱的情形；在共振腔的部分，為了提升壓控振盪器的頻率可調範圍，使用了二進制訊號所控制的電容陣列用來做輸出頻率的粗調。根據量測結果，壓控振盪器核心消耗功率為6.18 mW，頻率可調範圍達到44.81 %，1 MHz偏移處的相位雜訊在可調頻率範圍內最佳為-121.15 dBc/Hz。

This thesis presents two function block designs of 2.4 GHz RF front-end receiver. There are two parts to the thesis. One concerns a 2.4 GHz low noise amplifier (LNA) and the other concerns a 2.4 GHz voltage-controlled oscillator (VCO). Also, the first part studies the effect of the EMI suppression of honeycomb-shaped inductor on an LNA circuit. The proposed circuit designs are implemented in TSMC 0.18-μm CMOS process with operating voltages 1.8 V.
Due to the amplifier gain and noise figure consideration, the 2.4 GHz LNA adopts a triple-stage cascade topology. However, the high gain characteristic lets the stability issue becomes a serious problem. In the final stage of LNA, the testing inductors are placed closely next to the load inductor on the signal path. With the strong crosstalk effect, a large quantity of signal could feedback to the LNA input stage. The positive feedback phenomenon causes the amplifier unstable. However, a unique layout pattern of the honeycomb-shaped inductor (H-inductor) is presented in this work. This new shape of the inductor can provide better EMI suppression to adjacent devices. With the low crosstalk interference, LNA can remain in stable condition. The measurement results show that the H-inductor can significantly mitigate the crosstalk phenomenon over 21 dB as compared to the conventional single-turn octagon inductor.
The 2.4 GHz VCO design chooses the current-reused topology for reducing power consumption. To balance the output waveforms, a hybrid resistor biasing technique is adopted. For the LC tank design, a binary-weighted switched capacitor array (BW-SCA) is designed to coarsely tune the output frequency. The frequency tuning range is thus extended. According to the measurement results, the VCO core consumes 6.18 mW. The frequency tuning range percentage reaches 44.81 %. In the frequency tuning range, the minimum phase noise at 1 MHz frequency offset is -121.15 dBc/Hz.

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