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研究生: 郭權毅
Kuo, Chuan-I
論文名稱: HfAlO 輔助電荷捕捉層於 AlScN 與 HfAlO 鐵電 GaN HEMT 閾值調控之應用
HfAlO-Assisted Charge-Trapping Engineering in AlScN- and HfAlO- Based Ferroelectric GaN HEMTs
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 智慧半導體及永續製造學院 - 半導體製程學位學程
Program on Semiconductor Manufacturing Technology
論文出版年: 2025
畢業學年度: 113
語文別: 英文
論文頁數: 99
中文關鍵詞: 電荷捕獲鐵電性AlScNHfAlOEnhancement modeHEMT
外文關鍵詞: Charge trapping, Ferroelectricity, AlScN, HfAlO, Enhancement mode, HEMT
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  • 本論文於同一 GaN 平臺上成功製作增強型鐵電 HEMT 與增強型電荷捕陷 HEMT。承襲先前以高鋁含量電荷捕陷層 Hf0.78Al0.22O 之經驗,本論文將閘極堆疊優化為低鋁含量 Hf0.92Al0.08O。其閾值電壓位移 (ΔVₜₕ) 為 6.2 V,並確保持續穩定的偏壓後操作。
    在鐵電元件部分,本研究採用 10 nm Al2O3/25 nm AlScN 雙層閘極介電層製備 AlScN MIS-HEMT。該元件之峰值跨導為 88 mS·mm⁻¹,最大飽和電流達 356.9 mA·mm-1;其將可調閾值電壓視窗擴展至 12.47 V 以上,正向極化狀態下 Vₜₕ 約為 0.8 V。相較於傳統耗盡型 HEMT,本元件之導通電流與跨導幾乎無損耗,顯示結構設計得當且性能優異。
    綜合上述結果,本論文所提出之材料與閘極堆疊工程有效提升 GaN 基增強型元件的閘極控制能力、閾值電壓可調範圍及長期操作穩定性,為低功耗、高性能之 GaN 功率與射頻應用提供可行的技術途徑。

    In this study, enhancement-mode ferroelectric HEMTs and enhancement-mode charge-trapping HEMTs were realized on the same GaN platform. Leveraging prior experience with high-aluminum charge-trapping dielectrics (Hf0.78Al0.22O), the gate stack was re-optimized with a lower-aluminum composition, Hf0.78Al0.22O. The revised dielectric suppresses gate leakage by two orders of magnitude, from 1.4 mA mm⁻¹ to 0.081 mA mm⁻¹, while expanding the tunable threshold-voltage window to > 6 V and ensuring stable normally-off operation.
    Ferroelectric AlScN MIS-HEMTs were fabricated with 10-nm Al2O3/25-nm AlScN bilayer gates. Devices exhibit a peak transconductance of 88 mS mm⁻¹ and a maximum saturation current of 356.9 mA mm-1. A threshold-voltage shift (ΔVTH) of 12.47 V is obtained, with the forward-polarized state yielding VTH ≈ 0.8 V. Performance metrics remain comparable to conventional depletion-mode counterparts, indicating minimal compromise in on-state current or transconductance.
    The combined results demonstrate a practical route to low-power, high-performance GaN transistors for power and RF applications, achieving enhanced gate control, extended VTH adjustability, and long-term stability under enhancement-mode bias.

    摘要 I Abstract III 誌謝 V Table of Contents IX List of Figures XI List of Tables XIV CHAPTER 1 Introduction 15 1.1 Background 15 1.1.1 General Background 15 1.1.2 Ferroelectric gate stack 18 1.1.3 Charge trapping layer 20 1.2 Motivation 22 1.3 Organization 23 CHAPTER 2 Physical Theory 25 2.1 AlGaN/GaN Heterostructure 25 2.1.1 Lattice structure 25 2.1.2 Polarization 27 2.1.3 2DEG Formation 30 2.2 Ferroelectricity of AlScN 31 2.3 HfAlO 36 CHAPTER 3 Experiment 40 3.1 Experimental Equipment 40 3.1.1 Oven 40 3.1.2 Spin Coater 41 3.1.3 Mask Aligner 42 3.1.4 Ultrasonic Cleaner 43 3.1.5 E-Beam Evaporator 44 3.1.6 RTA System 45 3.1.7 Semiconductor Analyzer 46 3.1.8 RF Magnetron Sputter 47 3.1.9 Precision LC II ferroelectric tester 48 3.1.10 ICP-RIE System 50 3.1.11 Surface Profiler 51 3.1.12 Atomic Force Microscope 53 3.1.13 Focused Ion Beam 55 3.1.14 Transmission Electron Microscopy 56 3.1.15 Energy-dispersive X-ray Spectroscopy 57 3.1.16 X-ray Photoelectron Spectroscopy 58 3.1.17 Atomic Layer Deposition System 59 3.2 Device Structure and Fabrication 60 3.2.1 10 nm Al2O3/Al0.64Sc0.36N FeHEMT 60 3.2.2 10 nm Al2O3/ Hf0.92Al0.08O HEMT 64 CHAPTER 4 Results and Discussion 71 4.1 Hf0.78Al0.22O charge trapping layer 71 4.1.1 Physical Properties 71 4.1.1 Electrical Characterization 72 4.2 AlScN-based devices 75 4.2.1 Physical Properties 75 4.2.2 Electrical Characterization 76 4.2.3 Electrical Characterization and Threshold-Shift Analysis 79 4.3 Hf0.92Al0.08O-based devices 84 4.3.1 Physical Properties 84 4.3.2 Electrical Characterization 85 4.3.3 Memory Characterization and Threshold-Shift Analysis 87 4.3.4 C-V characteristic analysis 88 4.4 E-mode stability comparison 89 CHAPTER 5 Conclusion 92 CHAPTER 6 Future Work 94 References 95

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