在這篇論文中，主要可以分成兩個部分，第一個部分就是基於TMS320C542架構下的數位訊號處理器設計，第二個部分就是針對所設計出來的數位訊號處理器作測試。一般而言，對於處理器的測試方法若是採用掃瞄鍊的方式，可能會造成電路面積與費用的增加，除此之外，這種方法也會因此造成效能的降低。因此本論文所探討的測試方法主要是使用功能性的測試方法，功能性的測試方法可以用來解決上述的問題。

　　在功能性測試中，測試資料由功能性輸入腳位輸入，並由功能性輸出腳位輸出觀察結果。功能性的測試方法，重要的是如何產生好的測試程式。在這篇論文中，我們將展示一種產生測試程式的方法以及測試結果的相關分析。

　　This thesis consists of two major parts. The first part is the design of digital signal processor based on TMS320C542 architecture. The second part is the test of digital signal processor based on TMS320C542 architecture. In general, testing processors by way of inserting scan chains will result in hardware overhead and may cause potential performance degradation. In this work, we focus on exploring efficient functional testing methodology for solving above-mentioned problems.

　　In functional testing, the test patterns are applied through the functional input pins and the responses are observed from the functional output pins. Therefore, the more important thing is how to produce a good test program. In this thesis, we will present a method to generate test programs and relevant analysis of the test results.

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