| 研究生: |
蔡佩剛 Tsai, Pei-Kang |
|---|---|
| 論文名稱: |
應用於微波與毫米波鎖相迴路之關鍵電路設計 Designs of Key Component Circuits for Microwave and Millimeter-Wave Phase-Locked Loop Applications |
| 指導教授: |
黃尊禧
Huang, Tzuen-Hsi |
| 學位類別: |
博士 Doctor |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2013 |
| 畢業學年度: | 101 |
| 語文別: | 英文 |
| 論文頁數: | 111 |
| 中文關鍵詞: | 注入鎖定除頻器 、振盪器 、三倍頻器 、高除數注入鎖定除頻器 、雙頻帶 、雙模式 、鎖相迴路 |
| 外文關鍵詞: | Injection-Locked Frequency Divider (ILFD), Oscillator, Frequency Tripler, High-Division-Ratio ILFD, Dual-Band, Dual-Mode, Phase-Locked Loop (PLL) |
| 相關次數: | 點閱:156 下載:17 |
| 分享至: |
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本論文主要探究微波與毫米波鎖相迴路中之關鍵電路進行設計,其中包括了雙頻段四相位壓控振盪器、高除數與雙模注入鎖定除頻器與三倍頻器整合壓控振盪器。所有關鍵電路均使用CMOS 0.18μm製程進行實現與製作。
本論文含四大部分。在每一部份中我們說明和展示相關的新穎性設計概念。第一部分是使用新型之差動內菱形可切換式電感所設計的一個雙頻段(在 3 GHz 和 7 GHz)四相位壓控振盪器。此壓控振盪器相位雜訊受到切換電感在品質因子劣化上的影響可大幅地減小。為了對比不同電感對整體電路影響,使用傳統切換電感之四相位振盪器也同時被實現來與新型電感比較。根據實驗結果,新型內菱形可切換式電感確實能得到更佳的特性表現。在第二部分,本論文介紹了兩種不同的高除數注入鎖定除頻器。第一個除頻器結合了並聯阻抗提升(Shunt peaking)與電流流出(Current bleeding)技術以完成 23-27 GHz除三注入鎖定除頻器。它除了擁有1 GHz最大除頻範圍外,在功率消耗上也展現低功率之特性。在第二個 40 GHz注入鎖定除五除頻器中,使用串聯電感電容之帶通濾波器以消去不要之二階諧波並提高四階諧波以達成最大的鎖定範圍為0.735 GHz。在第三部分則是探討新的整合方式整合了壓控振盪器與三倍頻器之電路。由一個寬頻 8 GHz 壓控振盪器提供基頻與二階諧波傳送至三倍頻器中特定兩端點來增強混頻功能以產生22-27 GHz寬頻的頻率輸出。此外,藉由堆疊壓控振盪器與三倍頻器並搭配電流重複使用(Current reuse)技術,功率消耗可以達到僅 9mW。在論文最後部分介紹了使用再生式二階諧波回授技術之寬頻雙模注入鎖定除頻器。藉由此技術,寬注入鎖定頻寬可以同時達成在兩種模式(包括注入鎖定振盪器與注入鎖定除三除頻器)中保有寬注入鎖定頻寬。
以上所提及之關鍵電路,設計時皆考量鎖相迴路之需求。因此,最後實現之電路不但自身擁有良好的表現,也有極高的潛力應用在高效能微波與毫米波鎖相迴路中(例如寬頻、雙頻、低功率消耗等等)。
In this dissertation, the key component circuits of microwave and millimeter-wave phase-locked loops have been designed and investigated, including a dual-band quadrature voltage-controlled oscillator (QVCO), high-division-ratio and dual-mode injection-locked frequency dividers (ILFDs), and frequency triplers integrated with VCO. All the circuits are implemented and fabricated in 0.18-μm CMOS technology.
This dissertation is divided into four parts. In each part, the related novel design concepts are described and demonstrated. In the first part, a dual-band (3 GHz and 7 GHz) QVCO using new differential inner-diamond-structure (IDS) switchable inductors is proposed. Such proposed QVCO can ease the phase noise degradation resulted from a degraded quality factor. In contrast, a QVCO integrated with conventional differential switchable inductors has also fabricated and characterized for comparison. The experimental data highlights that the use of IDS switchable inductor provides a better performance outcome. The second part of this dissertation demonstrates two design cases of high-division-ratio ILFDs. The first ILFD combining the shunt-peaking and current-bleeding techniques can operate from 23 to 27 GHz with a division-by-three function. A maximum locking range of 1 GHz can be obtained with low power consumption. The second ILFD operates at 40 GHz with a division-by-five function. By using a series-LC band-pass filter to bypass the unwanted second harmonic and enhance the fourth harmonic at the common node of the injector transistor pair, a maximum locking range of 0.735 GHz can be achieved. The third part of this dissertation focuses on the new integration methodology of a VCO and a frequency tripler. An 8 GHz wideband VCO provides simultaneously the fundamental and second harmonic signals which are directly fed into the frequency tripler at two specified input nodes for enhancing the frequency mixing. Therefore, the wideband operation frequency range from 22 to 27 GHz can be achieved. Besides, by stacking the VCO and the tripler with a current-reused topology, the power consumption is only 9 mW. The last part of this dissertation presents a wideband dual-mode ILFD design by using a regenerative second-harmonic feedback technique. Wide input locking ranges can be achieved at two operation modes including the injection-locked oscillator (ILO) mode (i.e. divide-by-one) and the divide-by-three ILFD mode, by using the proposed regenerative feedback technique.
All above-mentioned component circuits are designed with the consideration of PLL system requirements. All the circuits not only have outstanding performances but also exhibit a high potential of use in high-performance microwave and millimeter-wave PLLs (e.g. wideband, dual-band, and low power consumption).
[1] C. Mishra, A. Valdes-Garcia, F. Bahmani, A. Batra, E. Sanchez-Sinencio, and J. Silva-Matinez, “Frequency planning and synthesizer architectures for multiband OFDM UWB radios,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 12, pp. 3744-3756, Dec. 2005.
[2] Ali M. Niknejad and H. Hashemi (Eds.), mm-Wave Silicon Technology – 60GHz and Beyond, New York: Springer Science+Business Media, LLC, 2007.
[3] V. Jain, F. Tzeng, L. Zhou, and P. Heydari, “A Single-Chip Dual-Band 22–29-GHz/77–81-GHz BiCMOS Transceiver for Automotive Radars,” IEEE J. Solid-State Circuits, vol.44, no. 12, pp. 3469-3485, Dec. 2009.
[4] H. Wu and L. Zhang, “A 16-to-18GHz 0.18-μm Epi-CMOS divide-by-3 injection-locked frequency divider,” in IEEE Int. Solid-State Circuit Conf. Dig. Tech. papers, Feb. 2006, pp. 2482-2491.
[5] C.-C. Chen, H.-W. Tsao, and H. Wang, “Design and analysis of CMOS frequency dividers with wide input locking ranges,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3060-3069, Dec. 2009.
[6] J. Lee and B. Razavi, “A 40-GHz frequency divider in 0.18-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 594-601, Apr. 2004.
[7] X. P. Yu, H. M. Cheema, R. Mahmoudi, A. v. Roermund, and X. L. Yan, “A 3 mW 54.6 GHz divide-by-3 injection locked frequency divider with resistive harmonic enhancement,” IEEE Microw. Wireless Compon. Lett., Vol. 19, no.9, pp. 575-577, Sep. 2009.
[8] C.-Y. Yang, C.-H. Chang, J.-H. Weng and H.-M. Wu, ”A 0.5/0.8-V 9-GHz frequency synthesizer with doubling generation in 0.13-μm CMOS” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 2, pp. 65-69, Feb. 2011.
[9] A. Italia, F. Carrara, A. Scuderi, E. Ragonese, C.D. Presti, G. Sapone, and G. Palmisano, “Radio-frequency front-end for 5 GHz wireless local area network transceivers,” IET Circuits, Devices & Systems, vol. 2, no. 5, pp. 439-450, 2008.
[10] M. Zargari, L. Nathawad, H. Samavati, S. Mehta, A. Kheirkhahi, P. Chen, K. Gong, B. Vakili-Amini, J. Hwang, M. Chen, M. Terrovitis, B. Kaczynski, S. Limotyrakis, M. Mack, H. Gan, M. Lee, R. Chang, H. Dogan, S. Abdollahi-Alibeik, B. Baytekin, K. Onodera, S. Mendis, A. Chang, Y. Rajavi, S. Jen, D. Su, and B. Wooley, “A Dual-Band CMOS MIMO Radio SoC for IEEE 802.11n Wireless LAN,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2882-2895, Dec. 2008.
[11] H.-K. Chen, H.-J. Chen, D.-C. Chang, Y.-Z. Juang, Y.-C. Yang, and S.-S. Lu, “A mm-wave CMOS multimode frequency divider,” in IEEE Int. Solid-State Circuits Tech. Dig., Feb. 2009, pp. 280-281, 281a.
[12] B. Çatlı and M. M. Hella, “A 1.94 to 2.55 GHz, 3.6 to 4.77 GHz Tunable CMOS VCO Based on Double-Tuned, Double-Driven Coupled Resonators,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2463-2477, Sep. 2009.
[13] S. Rong and H. C. Luong, "Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios,” IEEE Trans. on Circuits Syst. I, Reg. Papers, vol. 59, no. 3, pp.449-462, Mar. 2012.
[14] S. Rong and H. C. Luong, "1V 4GHz-and-10GHz Transformer-Based Dual-Band Quadrature VCO in 0.18-µm CMOS," in Proc. IEEE Custom Integr. Circuits Conf. (CICC), 2007, pp. 817-820.
[15] M.A. Do, R.Y. Zhao, K.S. Yeo and J.G. Ma, “New wideband/dualband CMOS LC voltage-controlled oscillator,” IEE Proceedings-Circuits, Devices and Systems, vol.150, no. 5, pp.453- 459, Oct. 2003.
[16] S. Yim and K. K. O, “Switched resonators and their applications in a dual-band monolithic CMOS LC-tuned VCO,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 74-81, Jan. 2006.
[17] J.-L. Wang, Y.-R. Tzeng, and T.-H. Huang, “Integrated switchable inductors with symmetric differential layout,” in Proc. Asia-Pacific Microwave Conference (APMC), Dec. 2006, pp.1369-1372.
[18] C.-H. Kim, S.-H. Shin and H.-J. Yoo, ”A Dual Band CMOS Quadrature VCO for Low Power and Low Phase Noise Application,” in Proc. IEEE International Workshop on Radio-Frequency Integration Technology (RFIT), Dec. 2007, pp. 310-313.
[19] P.-K. Tsai, Y.-T. Chen, and T.-H. Huang, “Novel Symmetric-Structure Switchable Differential Inductor Design,” in Proc. Asia-Pacific Microwave Conference, Dec. 2009, pp. 2140-2143.
[20] C. P. Yue and S. S. Wong, “On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF ICs,” IEEE J. Solid-State Circuits, vol. 33, pp. 743-752, May 1998.
[21] W. B. Kuhn and N. M. Ibrahim, “Analysis of Current Crowding Effects in Multiturn Spiral Inductors,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 1, pp. 31-38, Jan. 2001.
[22] C. Wang, H. Liao, C. Li, R. Huang, W. Wong, X. Zhang, and Y. Wang, “A Wideband Predictive “Double-π” Equivalent-Circuit Model for On-Chip Spiral Inductors,” IEEE Trans. Electron Devices, vol. 56, no. 4, pp. 609-619, Apr. 2009.
[23] H.-M. Hsu, J. -Z, Chang, and H.-C. Chien, “Coupling Effect of On-Chip Inductor With Variable Metal Width,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 7, pp. 498-500, Jul. 2007.
[24] P. Andreani, “A 2 GHz, 17% Tuning Range Quadrature CMOS VCO with High Figure-of-Merit and 0.6° Phase Error,” in Proc. European Solid-State Circuits Conference(ESSCIRC), Sep. 2002, pp 815-818.
[25] J. Lee, M. Liu, and H. Wang, “A 75-GHz phase-locked loop in 90-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1414-1426, Jun. 2008.
[26] S.-L. Jang and C.-W. Chang, “A 90 nm CMOS LC-tank Divide-by-3 Injection-Locked Frequency divider with record locking range,” IEEE Microw. Wireless Compon. Lett., vol. 20, no.4, pp. 229-231, Apr. 2010.
[27] S.-L. Jang, Y.-S. Chen, C.-W. Chang, and C.-C. Liu “A Wide-Locking Range ÷3 Injection-Locked Frequency Divider Using Linear Mixer,” IEEE Microw. Wireless Compon. Lett., vol. 20, no.7, pp.390-392, Jul. 2010.
[28] S.-L. Jang, J.-C. Luo, C.-W. Chang, C.-F. Lee, and J.-F. Huang, “LC-tank colpitts injection-locked frequency divider with even and odd modulo,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 2,pp. 113-115, Feb. 2009
[29] S. Rong and H. C. Luong, “A 1.7 mW 25 GHz transformer-feedback divide-by-3 frequency divider with quadrature outputs,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2007, pp. 328-331.
[30] S.-G. Lee and J.-K. Choi, “Current-reuse Bleeding mixer,” Electron. Lett., vol. 36, no. 8, pp. 696-697, Apr. 2000.
[31] S. Rong, A. W. L. Ng, and H. C. Luong, “0.9mW 7GHz and 1.6mW 60GHz frequency dividers with locking-range enhancement in 0.13µm CMOS,“ in IEEE Int. Solid-State Circuit Conf. Dig. Tech. papers, Feb. 2009, pp. 96-97.
[32] S.-L. Jang, C.-W. Tai, and C.-F. Lee, “Divide-by-3 injection locked frequency divider implemented with active inductor,” Microw. Opt. Technol. Lett., vol. 50, no. 6, pp. 1682–1685, Jun. 2008.
[33] M.-C. Chaung, J.-J. Kuo, C.-H. Wang, and H. Wang, “A 50-GHz divide-by-4 injection lock frequency divider using matching method,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 5, pp. 344-346, May 2008
[34] T.-N Luo, S.-Y Bai, and Y.-J. E. Chen, “A 44 GHz 0.18μm CMOS Superharmonic Frequency Divider,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2007, pp. 1409-1412.
[35] J.-C. Chien, C.-S. Lin, L.-H. Lu, H. Wang, J. Yeh, C.-Y. Lee, and J. Chern, “A harmonic injection-locked frequency divider in 0.18- μm SiGe BiCMOS,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 10, pp. 561-563, Oct. 2006.
[36] Y. Ding and K. K. O, “A 21-GHz 8-modulus prescaler and a 20-GHz phase-locked loop fabricated in 130-nm CMOS,” IEEE J. Solid-State Circuits, vol. 42, no. 6, pp. 1240-1249, Jun. 2007.
[37] A. W. L. Ng, G. C. T. Leung, K.-C. Kwok, L. K. Leung, and H. C. Luong, “A 1-V 24-GHz 17.5-mW Phase-Locked Loop in a 0.18-μm CMOS Process,” IEEE J. Solid-State Circuits, vol. 41, no. 6, pp. 1236-1244, Jun. 2006.
[38] M. Danesh, F. Gruson, P. Abele, and H. Schumacher, "Differential VCO and frequency tripler using SiGe HBTs for the 24 GHz ISM band," in IEEE RFIC Symp. Dig., Jun. 2003, pp. 277-280.
[39] S. Ko, J.-G. Kim, T. Song, E. Yoon, and S. Hong, “K- and Q-bands CMOS frequency sources with X-Band quadrature VCO,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2789-2800, Sep. 2005.
[40] G. Bu, A. R. Tavakoli, and K. Entesari, “A 24 GHz Indirect VCO in 0.18 µm CMOS Technology” in Proc. of Microwave Integrated Circuits Conference, Oct. 2008, pp. 71-74.
[41] G. Huang and V. Fusco, “A 94 GHz Wide Tuning Range SiGe Bipolar VCO Using a Self-Mixing Technique,” IEEE Microw. Wireless Compon. Lett., vol. 21, no.2, pp. 86-88, Feb. 2011.
[42] J. Yang, C.-Y. Kim, D.-W. Kim and S. Hong, “Design of a 24-GHz CMOS VCO with an asymmetric-width transformer,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 3, pp. 173-177, Mar. 2010.
[43] C.-C. Li, T.-P. Wang, C.-C. Kuo, M.-C. Chuang, and H. Wang, “A 21 GHz complementary transformer-coupled CMOS VCO,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 278-280, Apr. 2008.
[44] H.-Y. Lin, S. S. H. Hsu, C.-Y Chan, J.-D. Jin, and Y.-S Lin, “A Wide Locking-Range Frequency Divider for LMDS Applications,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 9, pp. 750-754, Sep. 2007.
[45] Y.-H. Chen, H.-H Hsieh, and L.-H Lu, “A 24-GHz receiver frontend with an LO signal generator in 0.18-μm,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1043-1051, May 2008.
[46] B. Catli and M. M. Hella, “Triple-push operation for combined oscillation/division functional in millimeter-wave frequency synthesizers,” IEEE J. Solid-State Circuits, vol.45, no. 8, pp. 1575-1589, Aug. 2010.
[47] E. Hegazi, H. Sjöland and A. A. Abidi, “A Filtering Technique to lower LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol.36, no. 12, pp. 1921-1930, Dec. 2001.
[48] S. Ko, J. -G. Kim, T. Song, E. Yoon, and S. Hong, “K- and Q-bands CMOS frequency sources with X-Band quadrature VCO,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2789-2800, Sep. 2005.
[49] K. Kwok and J. R. Long, “A 23-to-29 GHz transconductor-tuned VCO MMIC in 0.13 μm CMOS,” IEEE J. Solid-State Circuits, vol.42, no. 12, pp. 2878-2886, Dec. 2007.
[50] V. Jain, B. Javid, and P. Heydari,"A BiCMOS Dual-Band Millimeter-Wave Frequency Synthesizer for Automotive Radars," IEEE J. Solid-State Circuits, vol.44, no. 8, pp. 2100-2113, Aug. 2009.
[51] H.-K. Chen, T. Wang, and S.-S. Lu, “A Millimeter-Wave CMOS Triple-Band Phase-Locked Loop With A Multimode LC-Based ILFD,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1327-1338, May 2011.
[52] T.-N. Luo, S.-Y. Bai, and Y.-J. E. Chen, “A 60-GHz 0.13-μm CMOS divide-by-three frequency divider,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 11, pp. 2409-2415, Nov. 2008
[53] S.-L. Jang, R.-K. Yang, C.-W. Chang, and M.-H. Juang, “Multi-Modulus LC Injeciotn-Locked Frequency Dividers Using Single-Ended Injection,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, May. 2009.
[54] Y.-T. Chen, M.-W. Li, H.-C. Kuo, T.-H. Huang, and H.-R. Chuang, “Low-voltage K-band divide-by-3 injection-locked frequency divider with floating-source differential injector,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 1, pp. 60-67, Jan. 2012.
[55] C.-Y. Wu and C.-Y. Yu, “Design and Analysis of a Millimeter-Wave Direct Injection-Locked Frequency Divider with Large Frequency Locking Range,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 8, pp. 1649-1658, Aug. 2007.
[56] T.-H. Huang, S.-H. Li, P.-K. Tsai, and C.-C. Liu, “Reconfigurable CMOS Divide-by-3/-5 Injection-Locked Frequency Divider for Dual-Mode 24/40 GHz PLL Application,” in Proc. IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Nov. 2012, pp. 68-70.