摘要
相較於TiSi2與CoSi2，NiSi除了有較低的矽消耗，而且只需一階段退火。但是NiSi在高溫(>650°C)時卻會有熱穩定性不佳的問題，並容易形成高阻值的NiSi2相。為了改善及探討熱穩定性不佳的問題，研究中分三個部分討論，第一部分我們使用TiNx作為Ni的覆蓋層(capping layer)，並經由不同的氮含量觀察對TiNx覆蓋在Ni上後形成的金屬矽化物之熱穩定性作分析。由實驗結果發現，NiSi的熱穩定性隨著TiNx氮含量的增高而改善。可發現隨著TiNx氮含量越高，NiSi的表面聚集也可有效被抑制。第二部分使用不同中介層(Interlayer)材料並探討對NiSi熱穩定性之影響，比較於TiNx覆蓋層，在Ni與Si之間加入一層中介層擁有更好的熱穩定，並由片電阻即時量測(in-situ Rs)實驗結果發現，Zn中介層能將NiSi製程溫度增加至 700℃仍有極低的片阻值，XRD量測結果也發現加入Zn中介層經過700℃退火仍沒有NiSi2峰值。第三部份,使用不同的覆蓋層對不同離子佈植基板之矽化物製程熱穩定性分析，同時利用SEM觀察表面的聚集現象，XRD分析NiSi的結晶性，並利用TEM輔助觀察NiSi的聚集行為。由結果可觀察利用TiN覆蓋層，於700℃下退火阻值皆有上升的趨勢。另外，在使用Zn作為中介層下，摻質對阻值的影響較不明顯，由片電阻即時量測可觀察到即使>650℃下退火依然沒有電阻急遽上升的情況產生，這也證實Zn在互補式金氧半電晶體製程作為NiSi中介層材料有極佳的特性。

Abstract
Compared with TiSi2 and CoSi2, NiSi has lower Si consumption, and just need one- step annealing. But NiSi has poor thermal stability and tends to form NiSi2 phase which has higher resistance. To improve and investigate the problem of poor thermal stability, this study was distributed into three parts to discuss. In the part I, TiNx was used as capping layer of NiSi, and the thermal stability of metal silicide which is formed by TiNx covered on Ni film was analyzed by different of nitrogen flows. According to the result of experiment, thermal stability of NiSi was improved with the increase of nitrogen flows in TiNx. It was found that the TiNx capping layer could improve the thermal stability of nickel silicides and inhibit silicide agglomeration. The TiNx film deposited with higher N2 flow rates had better thermal stability than those with lower N2 flow rates. In the part II, different interlayer and investigated the effect of thermal stability of NiSi. Compared with TiNx capping layer, adding interlayer between Ni and Si had better thermal stability behavior. According to the result of in-situ Rs, Zn interlayer could make NiSi maintain extremely low sheet resistance when the temperature increased to 700℃. The XRD result show that the adding Zn interlayer of nickel silicide not found NiSi2 phase. In the part III, we analyzed thermal stability of silicidation with different capping layers on different ion implantation-substrates. In this case, the surface agglomeration was observed by SEM, the crystallization of NiSi was analyzed by XRD, and the agglomeration of NiSi was observed by TEM. According to the result, the resistance of NiSi after annealing in 700℃ trended to increase. Besides, the influence of dopant on resistance was not obvious if Zn was used as interlayer.
We could observe that the resistance of NiSi did not increase sharply by in-situ Rs. It could prove that Zn has great behavior as interlayer of NiSi in CMOS process.

References
[1] S.P. Murarka, “Silicides for VLSI applications,” Academic Press, Orlando,Florida, 1-16 (1983).
[2] M.A. Nicolet, “Diffusion barriers in thin films,” Thin Solid Films 52,415-443 (1987).
[3] P.S. Ho, “General aspects of barrier layers for very large scale integration applications,” Thin Solid Films 96, 301-316 (1982).
[4] H.H. Hosack, “Platinum silicide-aluminum Schottky diodecharacteristics,” Appl. Phys.
Lett. 21, 256-258 (1972).
[5] P.S. Ho, “Basic problems in interconnect metallization for VLSI applications,” Proc. 1984 ROC IEDMS, Edited by L.J. Chen, (Hsinchu,ROC, 1984), 471-476.
[6] S.P. Murarka, “Review: self-aligned silicides for VLSI applications－are they alternates for metals,” Semiconductor Silicon 1986, 297-315(1986).
[7] K. Tsukamoto, T. Okamoto, M. Shimiu, T.Matsukawa, and H. Nakata,“ Self-aligned titanium silicidation of submicron MOS devices by rapid thermal annealing,” IEDM 84, 130-135 (1984).
[8] A. Wang and J. Lien, “A self-aligned titaninum polycide gate and interconnect formation
scheme using rapid thermal annealing,”Electrochemical Society Extended Abstracts 85-1, 317-325 (1985).
[9] M.E. Alperin, T.C. Hollaway, R.A. Haken, C.D. Gosmeyer, R.V. Karnaugh, and W.D.
Parmantie, “Development of the self-aligned titaninum silicide process for VLSI applications,” IEEE Trans. Electron Devices, ED32, 141-149 (1985).
[10] T. Yamaguchi, S. Morimoto, H.K. Park, and G.C. Eiden, “Process and device performance of submicrometer-channel CMOS devices using deep-trench isolation and self-aligned TiSi2 technologies,” ibid, ED-32,184-190 (1985).
[11] Y. Taur, G.J. Hu, R. Dennard, L.M. Terman, C.Y. Ting, and K.E. Petrillo,“A self-aligned 1-ìm-channel CMOS technology with retrograde n-well and thin epitaxy,” ibid, ED-32, 203-212 (1985).
[12] H. Kaneko, M. Koyanagi, S. Shimizu, Y. Kubota, and S. Kishino, “Novel submicron
MOS devices by self-aligned nitridation of silicide,” IEDM 85, 208-211 (1985).
[13] T. Sands, J. Washburn, E. Myers, and D. K. Sadana, Nucl. Instrum. And Methods in
Phys. B 7/8, 337-345 (1985).
[14] E. Nagasawa, H. Okahayashi, and M. Morimoto, “A self-aligned Mo silicide
formation,” Jpn. J. Appl. Phys. 22, L57 (1983).
[15] H. Okabayashi, M. Morimoto, and E. Nagasawa, “Low-resistance MOS technology
using self-aligned refractory silicidation,” IEEE Tran. ED-31,1329-1341 (1984).
[16] W.J. Chen, Ph. D. Thesis, “Interfacial Reaction of Nickel Metal Thin Films on
Silicon,” National Tsing Hua University (1991).
[17] H.M. Lo, M. S. Thesis, “The Effects of Stress on the Formation of Nickel Silicides,”
National Tsing Hua University (1998).
[18] L.J Chen and C.Y. Hou, “On the Formation of Nickel Silicides by Thermal Annealing,”
Chn. J. Mat. Sci. 15 (1), 1-11 (1983). [19]http://download.intel.com/museum/Moores_Law/Printed_Materials/Moores_Law_2pg.pdf
[20]http://download.intel.com/technology/silicon/HighK-MetalGate-PressFoils-final.pdf
[21] C.S. Kang, H.J. Cho, R. Choi, Y.H. Kim C.Y. Kang, S.J. Rhee, C. Choi, M.S. Skbar, and J.C. Lee: Electron Devices, IEEE Transactions on, Vol. 51, Issue 2, Feb, 220, (2004).
[22] R. Beyers and R. Sinclair: J. Appl. Phys. 57, 5240 ~1985 (1985).
[23] S. Wolf: ”Silicon Processing for The VLSI ERA”, second addition, Lattice Press, vol. 2,Chapter 3, 2000.
[24] V. Probst, H. Schaber, P. Lippens, L. Van den hove and R. De Keersmacker: Appl. Phys.Lett. 52 (1988) 1803.
[25] H. Iwai et al. / Microelectronic Engineering 60 (2002) 157 –169
[26] Y. Taur, J. Y. C Sun, D. Moy, L. K. Wang, B. Davari, S. P. Klepner and C. Y . Ting: IEEETrans. Electron Devices 34 (1987) 575.
[27] C. C. Wang, C. J. Lin and M. C. Chen: J. Electrochem. Soc. 150 (2003) G557.
[28] A. Lauwers, A. Steegen, M. de Potter, R. Lindsay, A. Satta, H. Bender and K. Maex: J. Vac.Sci. & Technol. B 19 (2001) 2026.
[29] C. C. Wang, Y. K. Wu, W.H. Wu and M. C. Chen: Japan Society of Applied Physics Vol.44 No. 1A, 2005, pp. 108~113.
[30] M.-A. Nicolet and S. S. Lau,in VLSI Electronics—Microstructure Sciences, edited by N. G.Einsprich and G. B. Larrabee ~Academic, New York, 1983, Vol. 6, Chap. 6.
[31] T. Ohguro, et al: IEEE Trans, Electron Devices 41, 2305 (1994).
[32] T. Ohguro, S. Nakamura, M.Koike, T. Morimoto, A. Nishiymam, Y.Usihiku, T. Yoshitomi,M. Ono, M. Saito and H. Iwai: IEEE Trans. Electron Devices 41 (1994) 2305.
[33] C. C. Wang, and M. C. Chen: JJAP, Vol. 45, No. 3A, 2006, pp. 1582-1587.
[34] H. Jeon, C. A. Sukow, J. W. Honeycutt, G. A. Rozgonyi, and R. J.Nemanich, J. Appl. Phys., vol. 71, no. 9, p.1, 1992.
[35] T. Morimoto, T. Ohguro, H. S. Momose, T. Iinuma, I. Kunishima, K.Suguro, I. Katakabe, H. Nakajima, M. Tsuchiaki, M. Ono, Y. Katsumata,and H. Iwai, IEEE Trans. Electron Devices, vol. 42, no. 5, p. 915, 1995.
[36] J. A. Kittl, Q. Z. Hong, H. Yang, N. Yu, S.B. Samavedam and M. A.Gribelyuk, Thin Solid Films, vol. 332, p. 404, 1998.
[37] Q. Z. Hong, W. T. Shiau, H. Yang, J. A. Kittl, C. P. Chao, H. L. Tsai, S.Krishnan, I. C. Chen, R. H. Havemann, IEDM Tech. Digest 1997, p. 107,1997.
[38] B. A. Julies, in: Corss-sectional Transimission Electron Microscopyof Nickel Silicide Formation, University of the Western Cape, Bellville, 1993.
[39] M. -A. Nicolt and S. S. Lau, in VLSI Electronics: Microstructure Science, vol. 6, Chapter 6, Academic Press, pp. 457, 346, 358, 1983.