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研究生： 李大輝
Lee, Da-Huei
論文名稱： 應用於超取樣及Nyquist頻率資料轉換器之動態元件匹配技術
Dynamic Element Matching Approaches for Oversampling-Rate and Nyquist-Rate Data Converters
指導教授： 郭泰豪
Kuo, Tai-Haur
學位類別： 博士
Doctor
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2008
畢業學年度： 96
語文別： 英文
論文頁數： 113
中文關鍵詞： 動態元件匹配 、資料轉換器 、低成本
外文關鍵詞： dynamic element matching, low-cost, data converters
相關次數： 點閱：129  下載：25 
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    • 由於近年來數位訊號處理系統應用迅速成長，資料轉換器已經成為積體電路中非常重要的組成方塊，而為了滿足越來越複雜的系統單晶片(system-on-a-chip)應用，成本較低的高效能資料轉換器需求也就越來越大。在實現低成本高解析度資料轉換器的時候，元件不匹配(element mismatch)是一個相當重要的影響因子。動態元件匹配(dynamic element matching)技術已經被廣泛地用來抑制元件不匹配所造成的諧波失真(harmonic distortion)。本論文將提出且分析數種新的動態元件匹配技術。針對超取樣頻率(oversampling-rate)資料轉換器，提出步進式資料加權平均(advancing data weighted averaging)技術來解決傳統資料加權平均(data weighted averaging, DWA)技術的基頻帶內突波(baseband tone)問題。針對Nyquist頻率資料轉換器，提出隨機多重資料加權平均(random multiple data weighted averaging)技術、隨機增量式資料加權平均(random incrementing data weighted averaging)技術及隨機式溫度計編碼(randomized thermometer-coding)技術來獲得高無諧波失真動態範圍(spurious-free dynamic range)及低最大輸出誤差，並且實現了一個Nyquist頻率的電流汲取式(current-steering)數位類比轉換器來實地驗證本論文所提出之隨機式溫度計編碼技術。
    多位元三角積分調變器(delta-sigma modulator)應用於超取樣頻率資料轉換器時，經常採用資料加權平均技術來降低元件不匹配效應，然而卻會遭遇基頻帶內突波的問題。目前已有許多類資料加權平均(DWA-like)技術被發表用來解決基頻帶內突波問題，本論文將這些類資料加權平均技術區分為突波抑制(tone-suppressing)技術及突波遷移(tone-transferring)技術兩種類型，其中突波遷移技術可以得到比突波抑制技術好的訊號對雜訊暨失真比，但是如果輸入訊號有直流成份時可能會讓突波遷移技術無法發揮效用。因此，本論文提出一名為步進式資料加權平均技術的新型高適應性類資料加權平均技術，可擁有突波抑制技術及突波遷移技術兩種類型的特性。若再與輸入訊號直流成份偵測機制結合，步進式資料加權平均技術便成為可重設定(re-configurable)的類資料加權平均技術。
    本論文針對Nyquist頻率的資料轉換器，提出了三種動態元件匹配技術及一種數位類比轉換器的創新架構。此架構在使用這三種技術時將同時搭配布局切換技術(layout switching scheme)來使用。本論文所提出之隨機多重資料加權平均技術及隨機增量式資料加權平均技術擁有隨機(randomization)及連續選擇(consecutive selection)兩種特性。其中隨機特性可有效抑制由元件不匹配所產生的諧波失真，進而得到高無諧波失真動態範圍；而連續選擇特性則使得它在與旋轉式走法(rotated walk)切換技術同時使用時，可得到小的靜態輸出誤差。本論文更提出了第三種用於Nyquist頻率數位類比轉換器的技術，名叫隨機式溫度計編碼技術。此技術可同時提供隨機、連續選擇及低元件切換活動(low element switching activity)等三種特性，除了擁有隨機多重資料加權平均技術及隨機增量式資料加權平均技術的優點外，較低元件切換活動還可以得到較低的動態雜訊。
    本論文設計且實現了一個低成本高解析度電流汲取式數位類比轉換器，來實地驗證本論文所提出之創新架構。使用隨機式溫度計編碼技術，本論文以1P6M 0.18微米1.8伏特CMOS製程來實現一個14位元電流汲取式數位類比轉換器。量測結果顯示，在取樣頻率達10百萬赫茲的情況下，最佳之無失真訊號動態範圍可達80dB。其中隨機式溫度計編碼技術可以大幅改善被元件不匹配效應影響之無失真訊號動態範圍達16dB。此數位類比轉換器只使用了小於0.28毫米平方的主動面積，比目前14位元規格之其他世界一流轉換器來得小，甚至比其他12位元及10位元之轉換器都要小。

    Data converters have become very important building blocks for integrated circuits (ICs) due to the fast growth of digital signal processing systems recently. Lower cost high-performance data converters are strongly demanded to satisfy the requirements of more complicated system-on-a-chip (SOC) systems. Element mismatch is one of the major impairments for low-cost high-resolution data converters. Dynamic element matching (DEM) approaches have been widely used to suppress the harmonic distortions caused by element mismatches. In this dissertation, several DEM approaches are proposed and analyzed. For oversampling-rate data converters, advancing data weighted averaging (ADWA) is proposed to remedy baseband tone problems of conventional DWA. For Nyquist-rate data converters, random multiple DWA (RMDWA), random incrementing DWA (RIDWA) and randomized thermometer-coding (RTC) are proposed to achieve high spurious-free dynamic range (SFDR) and small maximum output error. Furthermore, an ultra low-cost Nyquist-rate current-steering digital-to-analog converter (DAC) is implemented to experimentally verify the proposed RTC.
    For oversampling-rate data converters, multibit sigma–delta modulators usually employ the DWA to suppress the element mismatch effect but are plagued by baseband tone problems. The existing DWA-like approaches for solving these problems are categorized in this dissertation as tone-suppressing and tone-transferring approaches. Although tone-transferring approaches can achieve a better signal-to-noise-plus-distortion ratio than tone-suppressing approaches, they may behave unfavorably for input signals with dc components. A flexible DWA-like approach, ADWA, which can achieve both tone-suppressing and tone-transferring functions, is proposed. Moreover, ADWA can be a reconfigurable approach that uses input signal detection schemes to set its configuration.
    For Nyquist-rate data converters, three DEM approaches are proposed to be used with a proper layout switching scheme in a proposed new DAC structure. RMDWA and RIDWA have randomization and consecutive selection properties. Randomization effectively suppresses harmonic distortions to achieve good SFDR. Consecutive selection obtains small static output errors when it is used with the presented rotated walk switching scheme. The third DEM approach proposed for Nyquist-rate DACs is RTC, which provides randomization, consecutive selection, and low element switching activity properties. In addition to the benefits of the proposed RMDWA and RIDWA, low element switching activity can achieve small dynamic errors caused by element switching.
    To experimentally verify the proposed RTC, a 14-bit ultra low-cost current-steering DAC is implemented in a 1P6M 0.18-μm 1.8-V CMOS process. The measured SFDR is up to 80dB for single-tone tests at a 10MHz sampling frequency. The measurement results show that the RTC can improve the SFDR by 16dB. The 14-bit current-steering DAC has an active area of less than 0.28-mm2. The active area of the DAC is smaller than those of the state-of-the-art DACs with 14-bit resolution. The active area of the DAC is also smaller than those of other published 12-bit and 10-bit DACs.

    Abstract (Chinese) I Abstract (English) III Acknowledgements V Contents VI List of Tables IX List of Figures X 1 Introduction 1 1.1 Backgrounds ……………………………………………………………… 1 1.2 Motivation ………………………………………………………………… 5 1.3 Organization ……………………………………………………………… 7 2 Advancing Data Weighted Averaging Approach for Multi-Bit Delta-Sigma Modulators 8 2.1 Introduction ………………………………………………………………… 8 2.2 Categorization of DWA-Like Approaches for Improving DWA Tone Effect 10 2.2.1 Tone Effect of Conventional DWA ………………………………… 11 2.2.2 Categorization of DWA-Like Approaches ………………………… 13 2.3 Advancing Data Weighted Averaging ……………………………………… 18 2.3.1 ADWA with a Fixed Advancing Step (Fixed-S ADWA) …………… 18 2.3.2 ADWA with Variable Advancing Step Set (Variable-S ADWA) …… 23 2.3.3 ADWA with Randomly Performed Advancing Action (Random ADWA) ……………………………………………………………… 25 2.4 Performance Comparisons between ADWA and DWA …………………… 26 2.5 Circuit Implementation ……………………………………………………… 30 2.6 Summaries ………………………………………………………………… 33 3 New Nyquist-Rate Current-Steering DAC Structure Combining Dynamic Element Matching Approaches and Proper Layout Switching Schemes 34 3.1 Introduction ………………………………………………………………… 34 3.2 Dynamic Element Matching Approaches and Their INL Performance …… 35 3.3 Random Incrementing Data Weighted Averaging ………………………… 39 3.3.1 Review of RMDWA ………………………………………………… 39 3.3.2 Proposed Random Incrementing Data Weighted Averaging ……… 42 3.3.2.1 Operation Principle of RIDWA …………………………… 42 3.3.2.2 Low-Cost Implementation for High-Speed RIDWA ……… 44 3.3.3 Performance Verifications of RIDWA ……………………………… 48 3.4 Comparisons between RIDWA and Earlier Works ………………………… 49 3.5 QN Rotated Walk Switching Scheme and the Benefit of Its Co-use with RIDWA …………………………………………………………………… 53 3.6 Summaries ………………………………………………………………… 60 4 Ultra Low-Cost 14-Bit Current-Steering DAC with a Randomized Thermometer- Coding Approach 61 4.1 Introduction ………………………………………………………………… 61 4.2 Randomized Thermometer-Coding Approach ……………………………… 62 4.2.1 Operation Principle ………………………………………………… 63 4.2.2 Analysis and Verification …………………………………………… 64 4.2.3 Low-Complexity RTC Realization ………………………………… 69 4.3 A 14-Bit DAC Implementation Using the RTC Approach ………………… 70 4.3.1 Segmentation and Matching Requirements of Current Cells ……… 70 4.3.2 Layout Switching Scheme for Current Sources …………………… 76 4.3.3 Floorplan …………………………………………………………… 77 4.3.4 Return-To-Zero Circuit ……………………………………………… 79 4.3.5 Analog Circuits ……………………………………………………… 82 4.3.5.1 Bias Circuit ………………………………………………… 82 4.3.5.2 Latch ………………………………………………………… 84 4.3.5.3 Decoupling MOS Capacitor ………………………………… 85 4.3.6 Digital Circuits ……………………………………………………… 86 4.3.6.1 Pseudo Random Number Generator ………………………… 86 4.3.6.2 Register ……………………………………………………… 87 4.3.6.3 Binary-To-Thermometer Decoder ………………………… 89 4.4 Experimental Results ……………………………………………………… 91 4.4.1 Test Setup …………………………………………………………… 91 4.4.2 Evaluation Board Design and Measurement Considerations ……… 92 4.4.2.1 Reference Voltage Circuits Design ………………………… 94 4.4.2.2 Digital Signal Termination Design ………………………… 95 4.4.2.3 Decoupling Design ………………………………………… 96 4.4.2.4 Load Resistor Consideration ……………………………… 97 4.4.3 Measurement Results and Comparisons ……………………………… 98 4.5 Summaries ………………………………………………………………… 104 5 Conclusions 105 Bibliography 107 Vita 112

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