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研究生： 蘇家寧
Su, Chia-Ning
論文名稱： 應用於電化學阻抗頻譜量測系統之寬頻率範圍之信號處理晶片設計
Design of a Wide-Frequency-Range Signal Processing IC for Electrochemical Impedance Spectroscopy Measurement System
指導教授： 魏嘉玲
Wei, Chia-Ling
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2016
畢業學年度： 104
語文別： 英文
論文頁數： 72
中文關鍵詞： 生物晶片 、電化學阻抗頻譜分析法 、寬頻率範圍 、帶通濾波器 、相位數位轉換器
外文關鍵詞： Biochip, Electrochemical impedance spectroscopy, Wide-frequency-range, Band-pass filter, Phase-to-digital converter
相關次數： 點閱：151  下載：4 
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    • 電化學阻抗頻譜分析法(Electrical Impedance Spectroscopy, EIS) 是一項常用的電化學檢測方式。根據使用EIS進行系統實作之量測結果，本論文所提出的信號處理晶片整合了在EIS量測系統中兩大主要功能電路，分別為具寬廣可調頻率範圍弦波頻率合成器以及阻抗數位轉換器。此外，增加可調頻率之切換電容式帶通濾波器於阻抗數位轉換器的前端以提高信噪比。最後，本論文提出一個新的相位數位轉換器之架構，以抑制雜訊影響。
    此晶片使用台灣積體電路公司 (TSMC) 0.35μm 2P4M 3.3V 混和訊號製程，以48 S/B 封裝，尺寸為2.07×1.68 mm2。此信號處理晶片之頻率範圍為 100 mHz 到 10 kHz。

    Electrical Impedance Spectroscopy (EIS) is a popular electrochemical detection method. Based on the EIS real experimental results, the proposed EIS signal processing chip integrates two main functional blocks of the EIS measurement system, wide range programmable sinusoidal frequency synthesizer, and impedance-to-digital converter (IDC). Tunable band-pass filters are designed and added prior to the IDC for increasing signal-to-noise ratio. Moreover, a new phase-to-digital conversion circuit is proposed to suppress the impact of noise.
    This chip was fabricated by using Taiwan Semiconductor Manufacturing Company (TSMC) 0.35μm 2P4M 3.3V mixed-signal polycide process. The die area of this chip is 2.07×1.68 mm2. The frequency range of this signal processing chip is from 100 mHz to 10 kHz.

    Table of Contents Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Organization 2 Chapter 2 Design of an EIS System on Printed Circuit Board 3 2.1 PCB Circuit Design and Layout 3 2.1.1 PCB Circuit and Design 5 2.1.2 PCB Schematic and Layout 9 2.2 LabVIEW Program and Data Acquisition (DAQ) 11 2.3 Measurement Result 17 2.3.1 Nyquist Plot of Ideal RC model (C=0.1 μF) 18 2.3.2 Nyquist Plot of Ideal RC model (C=0.068 μF) 20 2.3.3 Nyquist Plot of Potassium Hexacyanoferrate Solution 22 2.4 Summary 23 Chapter 3 Chip Circuit Design 24 3.1 Block Diagram 24 3.2 SC BPF 25 3.3 Phase-to-Digital Converter 31 3.4 Magnitude-to-Digital Converter 34 3.5 Reference Circuit 35 3.6 Clock Supply Circuit 36 3.7 Wide-Range Programmable Frequency Sinewave Generator 39 Chapter 4 Simulation Result and Layout 40 4.1 Simulation Results 40 4.1.1 Stability 40 4.1.2 Band-Pass Filter 42 4.1.3 Phase-to-Digital Converter 43 4.2 Layout 45 Chapter 5 Measurement Result 47 5.1 Band-Pass Filter 48 5.1.1 Frequency Response 48 5.1.2 Transient Response 50 5.2 Phase-to-Digital Converter 53 5.2.1 Measured Waveforms with Different Input Frequencies 53 5.2.2 Linearity of PDC 56 5.3 Magnitude-to-Digital Converter 58 5.3.1 Measured Waveforms with Different Frequency Signals 58 5.3.2 Linearity of MDC 61 5.4 Wide-Range Programmable Frequency Sine Wave Generator 63 5.4.1 Spectrum of Sine Wave 63 5.4.2 Transient Response 65 5.5 Specification 69 Chapter 6 Conclusion and Future Work 71 References 72

    [1] Y.-W. Wang, C.-L. Wei and B.-D. Liu “A Wide-Range Programmable Sinusoidal Frequency Synthesizer for Electrochemical Impedance Spectroscopy Measurement System,” IEEE Trans. Biomed. Circuits Syst., vol. 8, no.3, pp. 442–450, Jun. 2014.

    [2] W.-J. W, “Design of an Impedance-to-Digital Converter for Electrochemical Impedance Spectroscopic Measurement System,” M.S. thesis, Dept. of Elect. Eng., National Cheng Kung Univ., Tainan, Taiwan, R.O.C., Jun. 2013.

    [3] STMicroelectronics (2005), LD1117 Series, [Online]. Available: https://www.techshop
    bd.com/uploads/product_document/mXuqtqv.pdf

    [4] Texas Instruments, Inc., (2008), OPA2344, Dallas, TX. [Online]. Available: https://
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    [5] T.-A Chen, C.-L. Wei, T.-H Liu, R.-Y Lin and B.-D. Liu, “Dual-Mode Urinalysis Chip by Using Electrochemical Impedance Spectroscopy,” in Int. Conf. on Intelligent Computation and Bio-Medical Instrumentation (ICBMI’11), Wuhan, 2011, pp. 268–271.

    [6] Texas Instruments, Inc., (1998) , INA118 , Dallas, TX. [Online]. Avaliable: https://
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    [7] R. Raut and M. N. S. Swamy, “Appendix C: Element Values for All-Pole Double-Resistance-Terminated Low-Pass Lossless Ladder Filters” in Modern Analog Filter Analysis and Design: A Practical Approach,” WILEY-VCH, 2010, pp. 338–339.

    [8] R. Schaumann and M.E. Van Valkenburg, Design of Analog Filter. Oxford, 2010.

    [9] G. M. Jacobs, D. J. Allstot, R. W. Brodersen, and P. R. Gray “Design Techniques for MOS Switched Capacitor Ladder Filters,” IEEE Trans. Circuits Syst., vol. CAS-25, no. 12, pp. 1014–1021, Dec.1978.

    [10] C.-L. K, “On-Chip Reference Oscillators with Voltage and Temperature Compensation,” M.S. thesis, Dept. of Elect. Eng., National Cheng Kung Univ., Tainan, Taiwan, R.O.C., Jul. 2011.

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