近年來，彩圖加景深之立體視訊系統已提供人們更真實的視覺體驗，為提升該立體視訊系統的使用品質，本論文完成於彩圖加景深立體視訊系統中之快速演算法及其硬體架構設計，以增進立體視訊系統之執行效能。
首先，在立體視訊系統中，本論文針對彩圖加景深立體高效能視訊編碼(3D-HEVC)之視訊壓縮進行快速演算法設計；基於景深圖邊界與彩圖之區塊切割方式有極大相關性之下，本方法萃取了景深圖邊界，從中偵測出彩圖中不必要的區塊切割模式並省略對這些模式之搜尋計算，借此提高編碼效能。與相關研究相比，本演算法可減少約67.49%的編碼時間。
其次，在立體匹配(Stereo Matching)部分，本文提出二階式立體匹配演算法及疊代式聚合匹配演算法；二階式立體匹配演算法是以適應性權重匹配法為基礎，首先生成出一張粗略的深度圖，接著再針對不連續區域的深度資訊進行重新計算，最後合成出一張品質良好的深度圖；疊代式聚合匹配演算法則是以疊代的方式進行權重的聚合，以減少深度資訊的計算時間；此外，本文亦將疊代式聚合匹配演算法實現成硬體，以提升整體系統的效能。
然後，在基於景深圖之立體影像生成(DIBR)部分，本文提出以影像貼補演算法為基礎之快速立體影像生成演算法及其硬體和GPU架構；在以GPU實現的補洞演算法中，採用影像貼補的原理將洞進行分類，並依其種類以疊代的方式進行填補，藉此提高生成立體影像的正確率；在以硬體架構實現的多視角合成演算法中，本方法將影像及其深度圖中之物體邊緣部分對齊，並且採用洞的周遭資訊提升生成影像的精緻度，並且獲得更自然的立體影像。
最後，將多視角合成演算法與疊代式聚合立體匹配演算法結合後，一個雙視角轉多視角的立體影像生成系統於本論文中被提出，此系統的最高操作頻率為160.2 MHz，並且能即時輸出 1080p影像，亦能維持影像的品質。另外，本文亦針對新的影像格式-彩圖深度包裝格式進行硬體架構設計，此設計之最高操作頻率為166.6 MHz。

In recent years, the three-dimensional (3D) video system, which is in the representation of color texture and depth, brings users a more realistic visual experience. To enhance the video quality of the three-dimensional video system, this dissertation proposed a three-dimensional video system with fast algorithms and hardware design.
First, a 3DVC encoding system is proposed to reduce the computational complexity of three-dimensional high-efficiency video coding (3D-HEVC) by a fast mode decision method. In this method, the boundary of the depth map is extracted and applied for the unit partition mode detection before the partition for color texture coding. Compared with the related researches, this algorithm can reduce about 67.49% encoding time.
Finally, in stereo matching computation, adaptive support weight with census transform-based algorithm is then proposed to estimate the depth map. In the adaptive support weight method, a two-stage method is proposed to reduce the computation. A rough depth map is rapidly generated in the first stage while an adaptive refinement method for each case is applied in the second stage. The computation time is reduced by about 85%. In the census transform based algorithm, an iterative aggregation process is proposed which reduces complexity and is suitable for hardware realization. Furthermore, the corresponding VLSI is provided, and the speed achieves 60 fps with 1080p resolution.
For the depth image-based rendering (DIBR) system, two inpainting-based algorithms are proposed for nine views rendering and multi-view rendering, respectively. The nine views rendering DIBR method is implemented on the GPU which can increase the rendering speed. For the multi-view rendering, a patch-matched hole filling algorithm is proposed, where the best patch is searched with adaptive window size in the surrounding region to fill the holes. This work can support 1080p video in real-time at maximum operating frequency 160.2 MHz. This dissertation also proposed a hardware architecture for a new texture plus depth format-2Dcompatible packing and de-packing format. For the architecture, the operation frequency can reach 166.56 MHz, which can support the maximum frame size up to FHD in real-time.

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