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研究生： 許世杰
Hsu, Shih-Chieh
論文名稱： 正交分頻多工技術之電力線通訊系統研究與FPGA實現
Study and FPGA Implementation of Powerline Communication System using OFDM Signals
指導教授： 蘇賜麟
Su, Szu-Lin
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2004
畢業學年度： 92
語文別： 英文
論文頁數： 40
中文關鍵詞： 電力線通訊 、正交分頻多工
外文關鍵詞： OFDM, powerline communication
相關次數： 點閱：116  下載：3 
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    • 　　電力線遍及每一個有人存在的角落，就其分佈密度而言，電力線網路是世界上最大的網路，只要將裝置插進牆壁上插座，即可同時獲取電源又能傳輸資料，是個完美的通訊平台。雖然有很多人懷疑使用電力系統作為網際網路傳輸媒介之可靠性及實用性，但電力線通訊技術將來如有重大的突破想必一定能使人類的通訊更加方便。

    　　本論文著重於電力線通訊系統之實體層硬體實現，參考HomePlug 1.0 Specification所定義之實體層通訊技術(正交分頻多工之技術)，內容包含有OFDM symbol timing同步、Sampling Clock Offset所造成的影響與錯誤控制編碼。系統在SPW上模擬完成確定可行後，再進行硬體實作，硬體實作方面採用Xilinx公司之VirtexE 型號之FPGA來實現，設計流程採硬體描述語言(Verilog)之設計方式，並設計A/D 、D/A轉換器、濾波器與放大器電路，以架構完整之基頻通訊系統。

    　　Power line is found almost everywhere. According to the distributed density, power line network is actually the biggest network all over the world. We just plug the device into outlets, then the information will be transmitted over the power line channel and power will be also supplied simultaneously. It’s indeed a perfect communication platform, although many people doubt its reliability and practicability to make use of power line system as the communication medium of internet network. It must be more convenient for our communication in the future if we make a significant breakthrough on the technique of power line communication.

    　　This thesis focuses on the implementation of the physical layer of powerline communication system according to HomePlug 1.0 Specification. The contents are composed of OFDM symbol timing synchronization, the effect of sampling clock offset and error control code. First, we finish the system simulation in SPW and confirm that the system is practical with the hardware implementation. In the hardware implementation, we adopt the FPGA of VirtexE Family of Xilinx Inc. and implement with the hardware description language (Verilog). The circuits of A/D, D/A, filter, amplifier and etc. are designed to construct the complete baseband communication system.

    摘要 i Abstract ii Contents iv List of Tables vi List of Figures vii Chapter 1 Introduction......................................1 1.1 Overview of Power Line Communications.....................1 1.2 Outlines..................................................3 Chapter 2 Channel Characteristics of Power Line.............4 2.1 Intra-Building Power Line Circuit.........................4 2.2 Impedance of Residential Power Line Channel...............4 2.3 Channel Noises............................................6 2.4 Attenuation...............................................7 2.5 Multipath Effect..........................................9 Chapter 3 Homeplug 1.0 Standard............................10 3.1 Basic Principle of OFDM..................................10 3.2 System Specification.....................................12 3.2.1 Scrambler..............................................13 3.2.2 Convolutional Encoder/ Viterbi Decoder.................13 3.2.3 Interleaver............................................15 3.2.3 OFDM Symbols...........................................16 3.2.4 Preamble...............................................17 3.2.5 Mapping and Demapping..................................18 3.2.6 Signal Generation......................................20 3.3 Simulation...............................................22 Chapter 4 Description of the implemented system............23 4.1 System specifications....................................23 4.2 Symbol Timing Synchronization............................24 4.3 Effect of Sampling Clock Offset..........................27 Chapter 5 Hardware Design and Implementation...............28 5.1 Hardware Design..........................................28 5.1.1 Testing Environment....................................28 5.1.2 The Protocol of the Transmission Interface.............29 5.1.3 The Architecture of the FFT............................30 5.1.4 Upsampling.............................................30 5.1.5 Digital to Analog Converter Circuit....................31 5.1.6 Analog to Digital Converter Circuit....................32 5.1.7 Smooth Filter..........................................32 5.1.8 Coupling Circuit.......................................33 5.2 Implementation...........................................33 Chapter 6 Conclusion.......................................38 Bibliography.................................................39

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