CMOS影像感測器提供了一個深具潛力的機會，讓影像感測器與其他電路整合在同一晶片上，以降低元件與封裝的成本，CMOS影像感測器的功率消耗比CCD影像感測器更低。然而傳統的CMOS影像感測器面臨列固定圖像雜訊的問題，使得影像的品質在低照度的情形下大大的降低。

　　在本論文中我們提出一個新的壓制列固定圖像雜訊的方法，新的讀出電路是由一個原型的讀出電路與MOS電容所組成，利用這種方法，輸出電壓的差異將會減少，而影像品質就能獲得改善。MOS電容廣泛地被應用在積體電路中，因此我們所提出的方法可以很容易的被應用在CMOS影像感測器。

　CMOS image sensors offer the potential opportunity to be integrated in a VLSI electronic system on-chip. The component count and packaging cost are reduced. The power consumption of CMOS image sensors is lower than that of CCD image sensor. However, conventional CMOS image sensors suffer from column fixed pattern noise that causes large degradation in image quality at low illumination.

　In this paper, we propose a new method to suppressing column fixed pattern noise. The new readout circuit consists of a prototype readout circuit [11] and a MOS capacitor. This method decreases the deviation of the output voltage. And the image quality is improved. The MOS capacitor is generally used in integrated circuits. Therefore, the proposed method is easily implemented in CMOS image sensors.

[1] S. Morrison, “A new type of photosensitive junction device,” Solid-State Electronics, vol. 5, pp. 485-494, 1963.
[2] J. Horton, R. Mazza, and H. Dym, “The scanistor – a solid state image scanner,” Proc. IEEE vol. 52, pp. 1513-1528, 1964.
[3] M.A. Schuster and G. Strull, “A monolicthic mosaic of photon sensors for solid state imaging applications,” IEEE Trans. Electron Dev., vol. ED-13, pp. 907-912, 1966.
[4] G. P. Weckler, “Operation of p-n junction photodetectors in a photon flux integration mode,” IEEE J. Solid-State Circuits, vol. SC-2, pp.65-73, 1967.
[5] R. Dyck and G. Weckler, “Integrated arrays of silicon photodetectors for imaging sensing,” IEEE Trans. Electron Dev., vol. ED-15(4), pp.196-201, 1968.
[6] P. K. Weimer, G. Sadasiv, J. Meyer, L. Meray-Horvath, and W. Pike, ”A self-scanned solid-state image sensor,” Proc. IEEE, vol. 55, pp.1591-1602, 1967.
[7] P. Noble, “Self-scanned silicon image detector arrays,’ IEEE Trans. Electron Dev., vol. ED-15(4), pp.202-209, 1968.
[8] S. G. Chamberlain, ”Photosensitivity and scanning of silicon image detector arrays,” IEEE J. Solid-State Circuits, vol. SC-4(6) pp. 333-342, 1969.
[9] P. Fry, P. Noble, and R. Rycroft, “Fixed pattern noise in photomatrices,” IEEE J. Solid-State Circuits, vol. SC-5(5) pp.250-254, 1970.
[10] W. S. Boyle and G.E. Smith, “Charge coupled semiconductor devices,” Bell Syst. Tech. J., vol.49, pp.587-593, April 1970.
[11] T. Watabe, M.Goto, H. Ohtake, H. Maruyama and K. Tanioka, “A new readout circuit for an ultrahigh sensitivity CMOS image sensor ,” IEEE Transactions on Consumer Electronics, Vol. 48, No. 3, August 2002.
[12] T. Watabe, M.Goto, H. Ohtake, H. Maruyama, K. Tanioka and N. Egami, “New signal readout method for ultrahigh-sensitivity CMOS image sensor,” IEEE Transactions on Electron Devices, Vol. 50, No.1, January 2003.
[13] Bradley A. Minch and P. Hasler, “A Floating-Gate Technology for Digital CMOS Processes,” Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium, Vol. 2, pp. 400-403, 30 May-2 June 1999.
[14] D. Yang, A. EI Gamal, B. Fowler, and H. Tian, ”A 640x512 CMOS Image Sensor with Ultra Wide Dynamic Range Floating Point Pixel Level ADC”, ISSCC Digest of Technical Papers, San Francisco, CA, February 1999.
[15] D. Yang, B. Fowler, and A. EI Gamal. “A Nyquist Rate Pixel Level ADC for CMOS Image Sensors “. IEEE Journal of Solid State Circuits, pages 348-356, March 1999.
[16] N. Kawai, S. Kawahito, “Noise Analysis of High-Gain, Low-Noise Column Readout Circuits for CMOS Image Sensors”. IEEE Transaction on Electron Device, Vol. 51, No. 2, February 2004.
[17] Eric R. Fossum, “CMOS Image Sensors: Electronic Camera On A Chip,” Electron Devices Meeting, pp. 17-25, International 10-13 Dec. 1995.
[18] Sang Gu Kang, Doo Hyung Woo, and Hee Chul Lee, “Multiple Integration Method for High Signal-to-Noise Ratio Readout Integrated Circuit,” Custom Integrated Circuits Conference, pp.299-302, 3-6 Oct. 2004.
[19] Eric R. Fossum, “CMOS Image Sensors: Electronic Camera-On-A-Chip,” IEEE Transactions on Electron Devices, vol. 44, pp. 1689–1698, October 1991.
[20] G. P.Weckler, “Operation of p-n junction photodetectors in a photon flux integration mode,” IEEE J. Solid-State Circuits, vol. SC-2, pp. 65–73, 1967.
[21] J. Hynecek, “A new device architecture suitable for high-resolution and high performance image sensors,” IEEE Trans. Electron Devices, vol. 35, no. 5, May 1988.
[22] Iliana L. Fujimori, Ching-Chun Wang, and Charles G. Sodini, “A 256×256 CMOS Differential Passive Pixel Imager with FPN Reduction Techniques,” IEEE Journal of solid-state Circuits, Vol. 35, No. 12, December 2000.
[23] M. White, D. Lampe, F. Blaha, and I. Mack, “Characterization of surface channel CCD image arrays at low light levels,” IEEE J. Solid-State Circuits, vol. SC-9, pp. 1–13, Sept. 1974.
[24] N. Tanaka et al. “A 310 k Pixel Bipolar Imager (BASIS),” in ISSCC Dig. Tech. Papers, Feb. 1989, pp. 96–97.
[25] O. Yadid-Pecht, B. Pain, B. Mansoorian, and E. R. Fossum, “Optimization of active pixel sensor noise and responsivity for scientific applications,” Solid-State Sensor Arrays: Development and Applications, Proc. SPIE, vol. 3019, pp. 125–136, 1997.
[26] P. Noble, “Self-scanned silicon image detector arrays,” IEEE Trans. Electron Devices, vol. ED-15, pp. 202–209, Apr. 1968.
[27] R. Dyck and G. Weckler, “Integrated arrays of silicon photodetectors for image sensing,” IEEE Trans. Electron Devices, vol. ED-15, pp. 196–201, Apr. 1968.
[28] S. Kleinfelder, S. H. Lim, X. Q. Liu and A. EI. Gamal, “A 10,000 Frames/s CMOS Digital Pixel Sensor”. IEEE Journal of Solid State Circuits, Vol 36, No. 12, December 2001.
[29] T. Ozaki, H. Kinugasa, and T. Nishida, “A Low-Noise Line-Amplified MOS Imaging Devices,” IEEE Transaction on Electron Devices, Vol. 38, No. 5, May 1991.
[30] K. Yonemoto and H. Sumi, “A Numerical Analysis of a CMOS Image Sensor With a Simple Fixed-Pattern-Noise–Reduction Technology,” IEEE Transactions on Electron Devices, Vol. 49, No. 5, May 2002.
[31] Chia-nan Yeh “High dynamic range CMOS digital pixel sensor”, Department of Electrical Engineering, National Cheng Kung University Tainan, Taiwan, R.O.C. Thesis for Master of Science, June 2003.
[32] Chun-Chieh Wang “Design of high dynamic range CMOS image sensor”, Department of Electrical Engineering, National Cheng Kung University Tainan, Taiwan, R.O.C. Thesis for Master of Science, June 2004.
[33] K. Yonemoto and H. Sumi, “A CMOS Image Sensor with a Simple Fixed-Pattern-Noise -Reduction Technology and a Hole Accumulation Diode,” IEEE Journal of Solid-State Circuits, Vol. 35, No. 12, December 2000.
[34] Neil H. E. Weste and Kamran Eshraghian, “Principles of CMOS VLSI Design: A Systems Perspective,” 2th ed., Addison Wesley, 1993.