遞迴渦輪碼因其能提供靠近沈農極限(Shannon limit)的錯誤更正表現，被廣泛研究與應用在各種的無線通訊標準。在1999年，非單二元遞迴渦輪碼被證明編碼效能優於單二元遞迴渦輪碼，近年來在DVB-RCS、DVB-RCT、WiMax以及HomePlug_GP等通訊協定都選用雙二元遞迴渦輪編碼，雙二元渦輪解碼器在電路設計上比傳統單二元解碼器複雜許多，若欲符合各通訊協定中需求的輸出率(throughput)，常需使用平行化處理架構。如何減少渦輪解碼器功率消耗並降低平行化的交織位址產生器複雜度，成為平行雙二元渦輪解碼器設計的重要課題。

本篇論文結合反向式(reverse)與追回式(traceback)演算法實現雙二元渦輪解碼器。在保持傳統最大機率演算法解碼效能的情況下，以低複雜度運算來減少所需狀態記憶體存取(state memory access)位元數。另外提出平行式交織位址產生器(parallel interleaver address generator)設計，使用低複雜度之交錯排列位址運算，同步產生不同軟式輸入/輸出解碼器所需之輸入記憶體(input buffer)和外質記憶體(extrinsic information memory)存取位址，並合併外質資訊記憶體。實驗結果顯示，此解碼器具有較小的交錯排列位址產生器與外質資訊記憶體面積。混合反向式與追回式雙二元反向運算法可降低狀態記憶體存取功率。

Convolutional turbo code is widely used in many wireless communication standards because it can provides error-correction performance near the Shannon capacity limit. The non-binary convolutional turbo code close to proven to have better coding gain than the single-binary convolutional turbo code in 1999. In recent years, DVB-RCS, DVB-RCT, WiMax and HomePlug_GP standards have chosen double-binary convolutional turbo code as their encoding methods. The circuit design for double-binary convolutional turbo decoder is more complex than that of the single binary one, and parallel processing is frequently applied to fit the required throughput in different standards. How to reduce the power consumption and the parallel interleaver complexity are essential to the turbo decoder design.

This work presents a low memory access double-binary turbo decoder by combining the reverse and traceback algorithms. It reduces the bit number of state metric memory access by low complexity calculation and has no decoding performance loss. Moreover, a low complexity address generator for parallel interleaver design is proposed to access input buffer and extrinsic information memory banks simultaneously. The extrinsic information memory banks can be merged to reduce the cost. Experimental results show that this decoder achieves a smaller area in interleaver address generator and extrinsic information memory size. The proposed hybrid reverse and traceback method can lower the number of memory access, result in power saving during memory access.

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