本論文實現一個10位元每秒800百萬取樣率的電流式數位類比轉換器，基於考量電路的線性度和晶片面積大小，編碼方面採用了二位元權重碼和溫度碼所組成，電流源電晶體採用面積分析去克服製程變動，而為了抑制突波增進電路的動態效能，訊號同步方面改採用正反器方式實現。

晶片實現使用TSMC 0.18μm 1P6M CMOS製程，電流式數位類比轉換器在模擬結果取樣頻率為800MS/s下，當輸入訊號為102MHz時，無雜訊動態範圍(SFDR)可達到61.9dB，微分非線性度(DNL)介於+0.454/-0.258LSB、積分非線性度(INL)介於+0.310/-0.206LSB，整體晶片面積為1.458 x 1.248 mm2，總功率消耗20.98 mW。

A 10-bit 800M-Sample/s current-steering digital-to-analog converter (DAC) is designed in this thesis. Considering both circuit linearity and chip area, binary-weighted code and thermometer codes are used in encoding. Area analysis is used to overcome process variations for current source transistors. In order to reduce glitch and enhance dynamical performance of the DAC, flip-flops are utilized in signal synchronization.

The chip is implemented in TSMC 0.18μm 1P6M CMOS technology. Simulation results show that the SFDR of the current-steering DAC with an input frequency of 102MHz under sampling frequency of 800MHz is 61.9dB. The DNL is about +0.454/-0.258LSB and INL is about +0.310/-0.206LSB. The total area is 1.458 x 1.248 mm2. The total power consumption is 20.98 mW.

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