在本文中，一種以有機金屬氣相沉積系統在砷化鎵(GaAs)基板上成長高品質的砷化銦鎵(InGaAs)或磷化銦(InP)緩衝層的新穎技術和一種新發展的檸檬酸緩衝蝕刻液(可應用於閘極凹陷製程)已被提出來，這將有助於高電子遷移率電晶體效能(HEMT)的改善。近來，砷化鎵系列變形高電子遷移率電晶體(M-HEMT)技術受到高度重視，成為磷化銦高電子遷移率電晶體之外另一低成本的選擇。然而，成長此變形緩衝層將面臨由晶格不匹配所造成大的表面粗糙度與高缺陷密度。
　　對於成長變形緩衝層，我們提出一種簡單而且新穎的技術可在砷化鎵基板上直接成長砷化銦鎵或磷化銦薄膜(< 1 μm)，可取代以往使用應變層超晶格、兩段式、漸進式或樣板式的沉積方式，同時可維持低缺陷，高晶格品質以及如鏡面一般平坦的表面。對於在砷化鎵上直接成長砷化銦鎵的技術來說，我們發現表面粗糙度均方根植只有6.9 Å (由原子力顯微鏡得到)與半高寬值925 arcsec (由X-射線繞射儀得到)的具有良好品質的In0.54Ga0.46As緩衝層可以在440 oC的低成長溫度與固定在5的Ga/In氣相分壓下得到，此優良的結果一部份是由於低溫成長技術的運用。我們也發現此技術可運用在砷化鎵上直接成長磷化銦緩衝層，由實驗結果得到的結論是將其五三比調整在130至210之間並將成長溫度控制在約480 oC下可達到在砷化鎵基板上直接成長出高品質的磷化銦層材料。
　　在砷化鎵系列高電子遷移率電晶體製程中，閘極凹槽蝕刻是一個非常關鍵性的步驟；在一個狹窄的製程適用範圍中，凹槽深度與蝕刻後的平坦度皆難以精確控制，並會對元件效能造成明顯的影響。因此，選擇性濕式蝕刻是一個可達到良好平坦度、良率以及無離子破壞的製程。
　　在本研究中，我們提出一種新發展的CA/H2O2/H2O蝕刻液(CA = 檸檬酸:水的重量比為1:1)；其GaAs/Al0.2Ga0.8As蝕刻選擇性可高達256並有一合理的砷化鎵蝕刻速率約43.6 Å/s。此一高選擇性是由於考慮雙氧水在這個蝕刻系統中的參與以致於在Al0.2Ga0.8As的表面上形成不可溶解的三氧化二鋁。在砷化鋁鎵/砷化銦鎵假晶式高電子遷移率電晶體的閘極凹槽製程中，甚至在經過8分鐘的過度蝕刻後仍未見到汲極電流顯著下降，且蝕刻後的表面非常的平坦且其表面粗糙度只有1.97 Å。此一蝕刻過後的良好表面狀態在假晶式高電子遷移率電晶體中可以很明顯地抑制元件閘極漏電流與雜訊。
　　以新發展的蝕刻液製造的1 × 100 μm2空乏形與增強型砷化鋁鎵/砷化銦鎵假晶式高電子遷移率電晶體表現出良好的直流與微波特性。閘極崩潰(BVGD)與導通(VON)電壓在閘極電流為1mA/mm時，空乏形與增強型假晶式高電子遷移率電晶體分別是-11.3和0.9 V與-12.4和1.0 V。對於電晶體輸出效能，汲極飽和電流在VGS = 0 V是317 mA/mm (空乏型)和VGS = 1.0 V是242 mA/mm (增強型)。而空乏型與增強型假晶式高電子遷移率電晶體的臨限電壓(Vth)分別是-1.99和0.13 V，其最大的Gm值分別是199和315 mS/mm。此元件亦有高線性度，對於空乏型與增強型假晶式高電子遷移率電晶體分別有0.96和0.46-V-wide的有效閘極偏壓幅度(即對應最大Gm值下降10%)，IDS分別有221和143-mA/mm-wide。本文中的高閘極電壓幅度可與先前文獻的磷化銦鎵/砷化銦鎵空乏型假晶式高電子遷移率電晶體(0.75 V)，埋入式閘極磷化銦鎵/砷化鋁鎵/砷化銦鎵增強型假晶式高電子遷移率電晶體(0.42 V)與全砷化鋁鎵/砷化銦鎵增強型假晶式高電子遷移率電晶體(0.32 V)相媲美。此外，IDS漏電流在VGS是-2和0 V時，對空乏形與增強型假晶式高電子遷移率電晶體來說分別低於13.1和6.7 μA/mm。此一低IDS漏電流有助於減小元件功率消耗與訊號損失。而對於1 × 100 μm2增強型砷化鋁鎵在微波方面的特性來看，其最大穩定增益為16.2 dB (在6.6 GHz下)且最大截止頻率為11.2 GHz。而在2 GHz操作下所量測到的最小雜訊指數為0.72 dB而其相關增益為10.27dB(偏壓在VDS = 3 V 與 IDS = 7.5 mA下) ，這些良好的低雜訊與相關微波特性可證實使用此新式蝕刻液來執行閘極凹陷製程，可得到一相當均勻與平滑的蝕刻表面。
　　這種新發展的蝕刻液亦可應用於本研究中的假晶式高電子遷移率電晶體其在製作平台(mesa)製程時選擇性的蝕刻暴露在平台側壁的低能障通道，應用此技術製作的1 μm閘極長度元件可擁有良好的電流線性度，在VGD = -10 V時有非常低的閘極漏電流(2.4 μA/mm)和高於-25 V的閘極-汲極崩潰電壓，這將有助於高功率和無線通訊方面的應用。

　　A novel technique of directly growing high-quality InxGa1-xAs or InP buffer layers on GaAs substrates by MOCVD and a newly developed citric buffer etchant (for gate-recess process) have been proposed, which benefits the improvement of HEMT performance.　Recently, GaAs-based metamorphic HEMT technology has emerged as an attractive, low cost alternative to InP HEMTs. However, prevailing problems in metamorphic buffer are large surface roughness and high dislocation densities due to the lattice mismatch issue.
　　In this work, we present a simple and novel method of direct deposited thin InxGa1-xAs or InP buffer layers (< 1 μm) on GaAs substrates, instead of strained-layer superlattice, two-step, graded or CS (compliant substrates) methods, while maintaining low dislocations, high crystal quality, and uniform and mirror like surfaces. For the direct growth technique of InxGa1-xAs on GaAs, we found an excellent-quality In0.54Ga0.46As buffer of rms surface roughness of only 6.9 Å (by AFM) and FWHM of 925 arcsec (by XRD) can be obtained at a low growth temperature of 440oC with a constant Ga/Ingas partial pressure of 5. The superior results are partly due to the use of low temperature growth technology. We also found this growth technology is available to directly grow InP buffer on GaAs. The experimental results can conclude that the growth temperature of 480oC in harmony with the V/III ratios range of 130-210 is a suitable window to directly grow InP on GaAs substrates.
　　In GaAs-based HEMT fabrication, gate recess etching is a very critical process; within a narrow process window, the recess depth and etched uniformity are difficult to be precisely controlled, significantly influencing device performance. Hence, selective wet etching is a promising technique to achieve good uniformity, yield, and ion-damage free process.
　　In this study, we propose a newly developed CA/H2O2/H2O etchant (CA = citric acid:H2O of 1:1 by weight); the etchant possesses a high GaAs/Al0.2Ga0.8As etching selectivity of 256 with a suitable of GaAs etch rate of 43.6 Å/s. The high selectivity is due to consulting the participation of H2O2 in this etching system to form insoluble Al2O3 on the Al0.2Ga0.8As surface. For applications to Al0.2Ga0.8As/In0.15Ga0.85As PHEMT gate recess processes, no obvious drain current decrease can be perceived even after 8 min overetching. The etched surface is very smooth with the rms roughness of only 1.97 Å. This good etched surface state in PHEMT is very significant to suppress the device gate leakage current and noise bulges.
　　The fabricated 1 × 100 μm2 depletion- and enhancement-mode (D- and E-mode) Al0.2Ga0.8As/In0.15Ga0.85As PHEMTs using the studied etchant show good DC and RF characteristics. The gate breakdown (BVGD) and turn-on (VON) voltages at a gate current of 1 mA/mm are -11.3 and 0.9 V for D-mode, and -12.4 and 1.0 V for E-mode PHEMTs, respectively. For the output transistor performance, the drain saturation currents are 317 mA/mm at VGS = 0 V (D-PHEMTs) and 242 mA/mm at VGS = 1.0 V (E-PHEMTs). The threshold voltage (Vth) is -1.99 and 0.13 V, and the maximum Gm is 199 and 315 mS/mm for D- and E-PHEMTs, respectively. The devices also show high linearity of 0.96 and 0.46-V-wide effective gate bias swing (drop of 10% peak Gm) for D- and E-PHEMT, respectively, corresponding to 221 and 143-mA/mm-wide IDS. The high effective gate voltage swing in this work is comparable to the previous reports of InGaP/InGaAs D-PHEMT (0.75 V), buried gate InGaP/AlGaAs /InGaAs E-PHEMT (0.42 V), and fully AlGaAs/InGaAs E-PHEMT (0.32 V). In addition, the IDS leakage currents at VGS = -2 and 0 V for D- and E-PHEMTs are less than 13.1 and 6.7 μA/mm. For the microwave characteristics of the 1 × 100 μm2 studied E-PHEMTs, the maximum stable gain (MSG) of 16.2 dB was obtained at 6.6 GHz and the cut-off frequency (ft) of 11.2 GHz was realized. The measured minimum noise figure (NFmin) at 2 GHz is 0.72 dB with an associated gain of 10.27 dB can be achieved under VDS = 3 V and IDS = 7.5 mA. These premium low-noise and related RF performances may demonstrate the existence of a smooth and uniform etched surface after selective gate recessing, for the studied Al0.2Ga0.8As/In0.15Ga0.85As E-PHEMTs.
　　The newly developed etchant is also suitable for selective recessing the exposed low-barrier channel at mesa-sidewalls during mesa isolation for the studied PHEMTs. The 1 μm gate length devices exhibit good current linearity, very low gate leakage of 2.4 μA/mm at VGD = -10 V and high gate to drain breakdown over -25 V, which are beneficial for the applications of high power and wireless communication.

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