三維顯示模式之主動式有機發光二極體顯示器之畫素電路必須提高畫面更新頻率使其能在16.6 ms內將畫面分別呈現於左右眼，藉此產生視覺深度感。由於畫素電路採用薄膜電晶體作為驅動與開關元件，不同製程的薄膜電晶體元件其臨界電壓會因為製程上的誤差或者因長時間的使用而產生漂移，導致驅動電路之電流不均勻。此外，有機發光二極體材料隨著長時間使用而老化的現象導致整體面板的亮度均勻性以及亮度下降，也使畫面顯示品質造成影響。因此，對於適用於三維顯示模式之畫素電路，針對上述現象之補償與改善並且可在高速環境下操作，是重要的議題。
本論文針對上述問題提出三個新式適用於三維顯示器的畫素補償電路。第一個電路是利用4T2C的架構將傳統電壓驅動方式結合同步式驅動法來補償薄膜電晶體臨界電壓值的變異與因寄生電阻影響所造成之電源線電壓下降，模擬結果顯示所提出之電路在電晶體臨界電壓漂移±0.5 V時，整體灰階之電流衰減度仍然在5 %以下。此外，在模擬之電源線由10 V降至9.5 V且灰階電壓為-1.6 V時，其電流誤差為3.8 %。因此可驗證，所提出之電路具有高度電流穩定性同時也適用於三維顯示器之高速操作。由於第一個電路無法改善有機發光二極體材料老化所造成亮度衰減的現象，因此在第二個電路中，畫素內元件數增為5T2C來補償亮度下降的問題，由模擬結果顯示在三維顯示器的操作頻率240赫茲下，考慮掃描線的寄生電容電阻的負載效應，本電路在面板的四個角落相對的電流誤差率幾乎都小於5 %，而配合有機發光二極體元件老化的實驗，可驗證本電路在不同的灰階電流下皆能成功補償亮度的衰減，使亮度在有機發光二極體老化時仍能保持一致性。第三個電路則是使用了新興的非晶相銦鎵鋅氧化物薄膜電晶體來設計所提出之適用於三維顯示器的補償電路，其電路架構為4T2C。利用實際量測非晶相銦鎵鋅氧化物薄膜電晶體的電特性來建立模擬所使用的參數，並且製作70 × 70的畫素電路矩陣來量測電路的電流穩定性。從實驗結果顯示所提出之電路在六小時的操作下，畫素電路電流約只衰減3.3 %，因此驗證了所提出之電路具有高度電流穩定性。本論文所提出的三個電路皆能有效的改善有機發光二極體顯示器因材料變異所導致亮度不均勻或下降的現象，提升畫面品質，具有其應用的價值。

For three dimensional (3D) active matrix organic light emitting diode (AMOLED) displays, the display frame rate should be increased to send images to the left and right eyes within 16.6 ms for producing depth perception. Since the pixel circuit for 3D AMOLED displays utilizes a thin film transistor (TFT) as the driving and switching component, the variation in the VTH of the driving TFT due to process variation or long-term operation result in non-uniform driving current. Furthermore, luminance decay caused by OLED aging also directly influences the image quality of the AMOLED display. Therefore, to resolve the above problems with high speed operation is necessary for pixel circuits applied in 3D AMOLED displays.
This thesis proposes three novel 3D AMOLED pixel circuits and verifies their effectiveness by simulations and experiments. The first proposed 4T2C low temperature poly-silicon (LTPS) pixel circuit adopts the simultaneous emission driving scheme to compensate for both the threshold voltage variation of TFTs and power line IR-drops for implementation in high-speed 3D displays. Based on the simulation results, the relative current error rate of the proposed pixel circuit is below 5% over the entire data voltage range. In addition, while the voltage of the power line of the proposed pixel circuit drops from 10V to 9.5V, the maximum error rate is nearly 3.8%. Thus, the proposed pixel circuit has high immunity to the threshold voltage variation of the driving TFT and the IR drop of the power line. However, this circuit can not compensate for the luminance degradation of OLED material decay. Thus, the proposed second circuit uses the 5T2C structure to compensate for the luminance drop. To verify the operation of the proposed circuit with a frame rate of 240Hz in 3D AMOLED displays, the simulation includes the load effects of parasitic capacitance and resistance of the buslines. Simulation results show the current error rates at the four corners of the display are suppressed to below 5%. Moreover, based on the experimental results of OLED degradation, the second proposed circuit provides enough current to compensate for the degradation of luminance at various gray levels as the OLED degrades. Recently, amorphous indium gallium zinc oxide (a-IGZO) TFTs have gained special attention in pixel circuit design due to their favorable characteristics. Thus, the third 4T2C pixel circuit uses a-IGZO TFTs to compensate for the threshold voltage shift in 3D AMOLED displays. The parameters of the model card are established by the measurement results of a-IGZO TFTs. To verify the feasibility of the proposed circuit, a 70×70 a-IGZO pixel circuit array is fabricated. Experimental results demonstrate that the current of the proposed circuit only decays about 3.3% under six hours stress as the initial current is 0.62μA, and thus the OLED current stability of the proposed circuit can be investigated. The presented three circuits effectively improve the nonuniformity and degradation of luminance caused by degradation of TFTs and OLED. Thus, these circuits can significantly contribute to AMOLED applications.

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