本論文係利用具有高沉積速率與能提供大量氫自由基特性的HWCVD，首次於N型(111)矽基板上使用甲烷、矽甲烷與氫氣成長奈米碳化矽薄膜電晶體之研究。吾人利用FTIR量測原子間的鍵結、XRD量測薄膜結晶、SEM與AFM觀察表面結構與粗糙度、ESCA測量薄膜中碳原子之含量，並比較不同成長參數製作MSM結構之薄膜電流-電壓特性。以實驗所得最佳成長參數以奈米碳化矽薄膜作為主動層，並利用二氧化鈦與二氧化矽作為介電層製作薄膜電晶體。
　　實驗結果顯示，鎢絲溫度、薄膜中碳原子的含量與成長時氫自由基之數量對於影響薄膜結構與導電性有顯著之影響。使用二氧化矽/二氧化鈦結構作為介電層之薄膜電晶體具有較佳之驅動電流700μA、場效遷移率62.27cm2/Vs、開關電流比2×103。這個實驗結果優於已發表的奈米晶矽薄膜電晶體之場效遷移11cm2/Vs[29]和非晶矽薄膜電晶體之場效遷移率0.9cm2/Vs[30]。如此本元件更適合作為高場效遷移率的薄膜電晶體應用於大面積平面顯示器。

In this research, we prepared nano-crystalline silicon carbide thin film transistor (nc-SiC TFTs) by a hot-wire chemical vapor deposition (HWCVD) system. The system has the features of high deposition rate and generating large amounts of H radicals. Firstly, the nc-SiC thin films were deposited on Si substrates using CH4, SiH4, H2 gas mixture and characterized by FTIR, XRD, AFM and SEM, and ESCA for bond structure measurement, analyzing crystallinity, examination of surface roughness and morphology, and investigation of carbon atomic concentration in the film, respectively. Experimental results showed the filament temperature, atomic concentration of carbon and amounts of H radicals influenced on films’ morphology and conductivity significantly.

In addition, the deposition conditions such as flow rate of CH4 and H2, filament temperature were optimized by analyzing the I-V curves of a MSM (metal-semiconductor-metal) structure. In final, we used the optimized deposition condition to prepare the active layer of the nc-SiC TFTs with a stack gate oxide of SiO2/TiO2. The TFTs with SiO2/TiO2 have the typical performances such as driving current of 700μA, field effect mobility of 62.27cm2/Vs, and on-off current ratio of 2×103 . The field effect mobility of the nc-SiC TFT is better than that of 11 cm2/Vs for a nc-Si TFT, and 0.9 cm2/Vs for an a-Si TFT. Thus, the developed device is more suitable for large flat panel display applications.

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