| 研究生: |
蔡晏行 Tsai, Yen-Hsing |
|---|---|
| 論文名稱: |
一個應用於癲癇偵測與邊緣端訓練演算法之可程式化的RISC-V指令集深度學習加速硬體架構 A Programmable RISC-V DLA Hardware Architecture for Seizure Detection and On-device Training Algorithm |
| 指導教授: |
李順裕
Lee, Shuenn-Yuh |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2024 |
| 畢業學年度: | 112 |
| 語文別: | 中文 |
| 論文頁數: | 121 |
| 中文關鍵詞: | 生醫訊號處理 、癲癇偵測 、深度學習 、硬體加速 、RISC-V CPU 、邊緣端訓練 |
| 外文關鍵詞: | Biosignal Processing, Seizure Detection, Deep Learning, Hardware Acceleration, RISC-V CPU, On-device Training |
| 相關次數: | 點閱:131 下載:0 |
| 分享至: |
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校內:2029-06-25公開