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研究生： 李致賢
Lee, Chih-Hsien
論文名稱： 應用類似模擬退火之演算法於系統層級匯流排通訊架構上功率及效能的探勘
System-Level Bus-Based Communication Architecture Exploration for Power and Performance Using Modified Simulated Annealing Algorithm
指導教授： 邱瀝毅
Chiou, Lih-Yih
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2008
畢業學年度： 96
語文別： 英文
論文頁數： 79
中文關鍵詞： 通訊架構
外文關鍵詞： power estimation, communication architecture, synthesis
相關次數： 點閱：63  下載：1 
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    • 數位晶片進入了系統晶片(System on Chip ,SoC)的世代以後，有越來越多的矽智財(IP)被整合在同一個晶片上。這些矽智財透過晶片上的匯流排通訊架構(Bus-Based Communication Architecture)來做溝通，而匯流排通訊架構會影響到整個晶片的功率以及效能，所以如何選擇一個合適的通訊架構是一個很重要的問題。但是在探勘合適的通訊架構時龐大的搜索空間將會導致探勘時的困難。
    因此我們提出了一個快速且有效率的匯流排通訊架構之探勘方法。這個方法快速且不只考慮系統上的效能，也一併考慮到了系統上的功率消耗。更進一步的，它還提供了不同通訊架構上功率及效能的交換情形，這將對設計者選擇架構時有很大的幫助。
    在實驗結果的部分，我們用幾個實驗來說明這個方法有多快且多有效率。它不但可以有效的減少探勘空間以減少探勘時間，還可以展示功率及效能的交換情形。這個研究主要是提出一個探勘匯流排通訊架構的方法，以後若再加上完整的矽智財的功率模組(Power Model)，則可以更準確的估出功率消耗，也就會是一個更完整的探勘方法。

    Upon entering System-on-Chip (SoC) era, more and more Intellectual Properties (IPs) are integrated into the same chip. IPs communicate through communication architectures. The communication architectures consume lots of performance and power, so how to select suitable communication architectures is an important problem. However, the enormous exploration spaces impose challenges for exploration.
    Now, a speedy and effective communication architecture exploration approach is proposed in this work. This approach not only considers performance of the system but also power. Furthermore, it can provide the power/performance trade-off on different communication architectures, which helps designers to determine system architectures for different applications.
    In the case studies, we demonstrate how effective and speedy this approach is. This approach can reduce the exploration space to speed up the exploration time. In the future, we can annotate some power models in this work and get a very powerful and precise communication architecture exploration approach.

    Chapter 1 Introduction 1 1.1 The Trend of SoC Design on Communication Architecture 1 1.1.1 Motivation for SoC Design 2 1.1.2 Overview of Communication Architecture 2 1.1.3 Complexity of Exploring Communication Architecture 3 1.2 Impacts of Communication Architecture 4 1.2.1 Factors of Performance 4 1.2.2 Factors of Power Consumption 5 1.2.3 Power/Performance Trade-Off 6 1.3 Benefit for Early Design 7 1.4 Thesis Contributions 8 1.5 Thesis Organization 9 Chapter 2 Related Work 10 2.1 Performance-Driven Approaches for System-Level Communication Architecture Synthesis 10 2.1.1 Design Space Exploration for Optimizing On-Chip Communication Architecture 10 2.1.2 Automated Throughput-Driven Synthesis of Bus-based Communication Architectures 12 2.1.3 Some other Approaches and Summary 15 2.2 Communication Architectures Synthesis Considering Performance and Power 15 2.2.1 Power Aware Interface Synthesis for Bus-based SoC Designs 16 2.2.2 Power and Performance Exploration for System-Level Communication Architecture Using Trace-Driven Approach 17 2.2.3 Summary 19 2.3 System-Level Power/Performance Analysis for Communication Architecture 19 2.3.1 System-Level Performance Analysis for Designing On-Chip Communication Architectures 19 2.3.2 Trace-Driven System-Level Power Estimation of Communication Architecture 22 2.4 Summary 23 Chapter 3 Fast Trace-driven Power Estimator 24 3.1 Why Fast Trace-driven Power Estimator? 24 3.2 Earlier Work on TPE 25 3.3 Proposed Fast-TPE 25 3.3.1 Trace Construction 26 3.3.2 Communication Architecture Mapping 27 3.3.3 Power/Performance Analysis 28 3.4 An Example for Proposed Fast TPE 32 3.5 Additional Features of Fast TPE 33 3.5.1 Burst Size 34 3.5.2 Bridge 34 3.5.3 Multiple Frequencies 35 3.6 Verification using CoWare 36 3.6.1 Example System Description 36 3.6.2 The Trace of the Example System 38 3.6.3 Results of Verification 39 3.7 Summary 40 Chapter 4 Proposed Communication Architecture Synthesis Scheme and Algorithm 41 4.1 Problem Statements 41 4.2 Characteristics of Communication Architecture Exploration 44 4.3 Overview of Simulated Annealing Algorithm 47 4.4 Tabu Search 50 4.5 Proposed Communication Architecture Exploration Algorithm 50 4.5.1 Estimating Power and Performance 53 4.5.2 Perturbation 53 4.5.3 Acceptance Rule 59 4.5.4 Share Explored Structure (SES) 59 4.5.5 Stop Rules, Initial Temperature, Annealing Factor and other parameters 61 4.6 Proposed Communication Architecture Exploration Scheme According Tabu Search 61 4.7 Advantages of Proposed Scheme 62 4.8 Summary 64 Chapter 5 Case Studies and Discussions 65 5.1 Case 1 65 5.1.1 Case Description 65 5.1.2 Exploration Results and Discussions 67 5.1.3 Convergence of Proposed Algorithm 68 5.2 Case 2 70 5.2.1 Case Description 70 5.2.2 Exploration Results and Discussions 71 5.3 Case 3 72 5.3.1 Case Description 72 5.3.2 Exploration Results and Discussions 74 Chapter 6 Conclusions and Future Work 76 6.1 Conclusions 76 6.2 Future Work 77 Chapter 7 Reference 78

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