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研究生: 陳昱嘉
Chen, Yu-Chia
論文名稱: 適用於IEEE 1394 及 Ethernet 上之 整合性 MAC IP之設計
The Design of An Integrated MAC IP for IEEE 1394 and Ethernet
指導教授: 周哲民
Jou, Jer-Min
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2002
畢業學年度: 90
語文別: 英文
論文頁數: 99
中文關鍵詞: 傳輸標準高速資料傳輸
外文關鍵詞: MAC IP, IEEE 1394, IEEE 802.3
相關次數: 點閱:186下載:1
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  • 在將來的數位生活中,IEEE 1394與IEEE 802.3這兩種傳輸標準是相當重要且廣泛地被應用的;前者目前已被各式數位家電所採用,以具有高速資料傳輸功能;後者已是當架設各式LAN時常被採用的標準,未來則會被推廣到WAN的架設中。於是,如何在未來的電路設計中(如SoC、IA產品等),當需要這兩種標準時,簡化設計複雜度,以加快上市的時間,是相當重要的問題。

    在本篇論文中,我們提出一個同時合乎IEEE 1394 Link Layer和IEEE 802.3 MAC Layer的MAC IP,藉由輸入不同的參數模式,搭配經過我們一般化設計的狀態機與硬體,最後只要與IEEE 1394或是IEEE 802.3的Physical layer連接,便可以同一MAC Layer來進行IEEE 1394或以IEEE 802.3的規格來傳輸。此外,本MAC IP的設計,在當使用者設定完參數後,將會得到一synthesizable Verilog HDL code;此電路描述,除了可以直接加進使用者本身的 SoC設計中,或者可以獨立下載至FPGA後,再與系統作整合。在本篇論文的最後,我們將以本MAC IP來完成一IEEE 1394介面卡的設計為一例子,來作為一應用實例。

    In the future digitalized life, both of IEEE 1394 and IEEE 802.3 protocols will be very important and widely applied. The former is adopted by all kinds of digital multimedia devices to obtain high-speed transmissions. The later has been often adapted to construct LANs, and will be popularized to construct WANs. Thus, it is an important issue to simplify the design flow and reduce the time-to-market for integrating these two protocols into the whole system (e.g. SoC).
    In this paper, we present a new MAC IP, which meets the both specifications of IEEE 1394 Link Layer and IEEE 802.3 MAC Layer. The proposed MAC IP accepts different input parameters, and cooperates with different IEEE 1394 or IEEE 802.3 physical layer to transmit data through the same MAC layer by the communication procedure of IEEE 1394 or IEEE 802.3 mode. Besides, when the user finishes setting up the parameters of out MAC IP, he will get a synthesizable Verilog HDL code; this Verilog HDL code can be added to the SoC design flow directly or be downloaded to one FPGA before integrating into one system. At the last of this thesis, we illustrate a design example of IEEE 1394 interface card with our MAC IP to show the practicability of our design.

    Table of Contents List of Figures List of Tables Chapter 1 Introduction…………………………………………………………….1-1 1.1 Introduction of Home Network………………………………………………….1-1 1.2 The Goal of This Thesis…………………………………………………………1-3 1.3 Outline of this thesis…………………………………………….………………1-5 Chapter 2 Introduction of IEEE 1394………………………..…………………...2-1 2.1 Original Goals and Key Features of IEEE 1394………………………………...2-1 2.2 The architecture of IEEE 1394…………………………………………...……...2-3 2.2.1 Node and Module Architectures of IEEE 1394……………………...……...2-3 2.2.2 The Topology of IEEE 1394…………………...…………………………...2-4 2.2.3 The addressing of IEEE 1394…………………………….…………………...2-5 2.2.4 IEEE 1394 Protocol Architecture……………………………………………...2-5 2.3 The Link Layer of IEEE 1394…………………………………………………...2-7 2.3.1 Retries of Link Layer in IEEE 1394 Bus…………………………………...2-8 2.3.2 The Asynchronous arbitration of IEEE 1394 Bus……………...…………...2-8 2.3.3 The Isochronous arbitration and the Cycle Structure of IEEE 1394 Bus... 2-10 2.3.4 The Data-Strobe encoding…………………………...………….………...2-11 Chapter 3 Introduction to IEEE 802.3 MAC Layer…..…………………………3-1 3.1 Introduction………………………………..……………..……………………...3-1 3.2 Media Access Control Frame structure…………………..……………………...3-1 3.2.1 MAC frame format………………………...………..……………………...3-1 3.2.2 Elements of the MAC frame….……………………..……………………...3-2 3.2.2.1 Preamble field…………………………………..……………………...3-2 3.2.2.2 Start Frame Delimiter (SFD) field……………………………...……...3-2 3.2.2.3 Address fields…………………………………..……………………...3-2 3.2.2.4 Address designation……...……………………..……………………...3-3 3.2.2.5 Destination Address field………...……………..……………………...3-4 3.2.2.6 Source Address field…………..………………..……………………...3-4 3.2.2.7 Length/Type field………………………………….…………………...3-4 3.2.2.8 Data and PAD fields..…………………………..……………………...3-4 3.2.2.9 Frame Check Sequence (FCS) field……...……..……………………...3-5 3.3 Invalid MAC frame…………..…………………………..……………………...3-5 3.4 Carrier Sense Multiple Access with Collision Detection (CSMA/CD) access method………………………………………………………..……………………...3-6 3.5 Media Access Control Operation………………………...……………………...3-7 3.5.1 Normal Transmission Operation without collisions……………………..…3-7 3.5.2 Normal Reception Operation………………………..……………………...3-8 3.5.3 Access Collision and Recovery……………………..……………...……...3-10 Chapter 4 MAC IP Design………………………...………………………….……4-1 4.1 General Architecture design for MAC functions………………………………..4-1 4.2 The MAC IP Architecture………………………………………………….……4-4 4.3 Description of Function Blocks in MAC IP……………………………….……4-5 4.4 The Parameters of the MAC IP…………………………………………….……4-6 4.5 The Concept of Pipeline Finite State Machine…………………………….……4-7 4.6 The MAC IP Circuit Designs…………………………...………………….……4-8 4.6.1 The Transmitter and Receiver module…………………………..…….……4-8 4.6.2 The CRC Generator and Checker module…………………………….……4-9 4.6.3 The FSM Design of the Central Controller…………...……………….…..4-13 4.6.4 The FSM Design of FIFO controller………………….…………..….……4-14 4.6.5 The MAC IP Status Register module……..…………..…………..….……4-16 Chapter 5 The Interface Design of MAC IP………………….…………………..5-1 5.1 The Input and Output Ports of MAC IP……………………………….………...5-1 5.2 The Physical Layer Interface of MAC IP……………………..………………...5-3 5.2.1 The PHY- Link Interface Specification in IEEE 1394 standard Annex J.….5-4 5.2.1.1 Transmit Action…………………………………………………….…..5-4 5.2.1.2 Receive Action……………………….………………………………...5-5 5.2.2 Media Independent Interface (MII) Specification of IEEE 802.3………….5-5 5.2.2.1 Transmit Operation of MII……………………………………………..5-6 5.2.2.2 Receive Operation of MII………………….…………………………..5-6 5.2.3 The FSM of Physical Layer Interface controller………….………………..5-7 5.3 Virtual Component Interface of MAC IP………………………………………..5-8 5.3.1 Read Operation of VCI……………………………………………………..5-9 5.3.2 Write Operation of VCI…………………………………………..………..5-10 5.3.3 The FSM of VCI controller…………………..………………..…………..5-11 Chapter 6 Simulation Result……………………………………...……………….6-1 6.1 The Transmit Function Simulation of IEEE 1394………………...…………….6-1 6.2 The Receive Function Simulation of IEEE 1394…….………………………….6-3 6.3 The Receive Function Simulation of IEEE 802.3……………………………….6-6 6.3.1 Receive A Frame With No Error……………………………...…………….6-6 6.3.2 Receive A Frame With Error Indication…………………………………….6-7 6.4 The Transmit Function Simulation of IEEE 802.3……..……………………….6-9 6.4.1 Transmit A Frame Without Collision Detected………….………………….6-9 6.4.2 Transmit A Frame With Collision Detected………………..………..…….6-10 6.4.3 Transmit A Frame In Full Duplex Mode……………...…………..……….6-11 6.5 VCI Function Simulation with PCI bus wrapper………………………………6-13 6.6 The MAC IP download report on Xilinx VertexII xc2v6000-4...…..………….6-14 6.7 The MAC IP Critical Path Analysis……………………………………………6-15 Chapter 7 Application Example……………………………………..…………….7-1 7.1 IEEE 1394 Interface card……………………………………………….……….7-1 7.2 A Wavelet-based MPEG2 video Codec………………………...……….……….7-1 Chapter 8 Conclusion and Future Work………………..………………….…….8-1 Annex A The Schematic of MAC IP Validation Board………………………….A-1 References

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