| 研究生: |
謝政翰 Hsieh, Cheng-Han |
|---|---|
| 論文名稱: |
新型多階直-交流換流器之研製 Design and Implementation of a Novel Multi-Level DC-AC Inverter |
| 指導教授: |
鄭銘揚
Cheng, Ming-Yang |
| 共同指導教授: |
梁從主
Liang, Tsorng-Juu |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2012 |
| 畢業學年度: | 100 |
| 語文別: | 中文 |
| 論文頁數: | 58 |
| 中文關鍵詞: | 多階 、直-交流換流器 、數位訊號處理器 、正弦波脈寬調變 |
| 外文關鍵詞: | multi-level, DC to AC inverter, digital signal processor, sinusoidal pulse-width modulation |
| 相關次數: | 點閱:93 下載:6 |
| 分享至: |
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本論文提出一新型單相七階直-交流換流器,配合適當的功率開關控制訊號,使換流器輸出近似弦波之七階電壓,再經輸出端之低通濾波器濾波後可得到一與市電頻率相同之弦波。此方式不僅可以減少功率開關之切換損失,還可以降低元件上之應力。首先分析七階換流器之動作模式與輸入電容電壓平衡之方法,最後研製一輸入電壓400 V,輸出220 Vrms /2 kW之新型七階換流器,使用TMS320LF2407數位訊號處理器搭配正弦波脈寬調變技術調控功率開關之訊號來控制。由量測結果驗證,此換流器之最高效率為96.9%且滿載效率為94.6%。
In this thesis, a novel multi-level DC-AC inverter is proposed. The proposed multi-level inverter generates seven levels AC output voltage with the appropriate gate signals design. Also, the low pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multi-level inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multi-level inverter with 400 V input voltage and output 220 Vrms /2 kW is implemented. The multi-level inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.
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