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研究生: 丁信文
Ting, Hsin-Wen
論文名稱: 應用於類比數位轉換器SNDR及ENOB測試之時域內建自我測試方法
A Time Domain Built-In Self-Test Methodology for SNDR and ENOB Tests of Analog-to-Digital Converters
指導教授: 劉濱達
Liu, Bin-Da
張順志
Chang, Soon-Jyh
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2004
畢業學年度: 92
語文別: 英文
論文頁數: 78
中文關鍵詞: 三角積分調變器快速傅立葉轉換窗函數協調取樣內建自我測試有效位元數訊號與雜訊諧波比傳輸參數類比數位轉換器
外文關鍵詞: ADC, BIST, window function, coherent sampling, transmission parameter, SNDR, ENOB, sigma-delta modulator, FFT
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  •   在本論文中,我們提出了一個應用於測試類比數位轉換器(ADC)之重要傳輸參數(transmission parameters):訊號與雜訊諧波比(signal-to-noise- and-distortion ratio, SNDR)以及有效位元數(effective number of bit, ENOB)之內建自我測試(built-in self-test, BIST)方法。在訊號產生器(signal generator)部分,我們利用帶通三角積分調變器(sigma-delta modulator)為基礎來設計可同時產生類比與數位高頻弦波的訊號產生器,其所產生訊號的振幅與頻率相對於純粹利用類比訊號產生器而言更能精確地控制。在輸出響應分析器(output response analyzer)方面,不同於傳統的測試方法,經由快速傅立葉轉換(Fast Fourier Transformation, FFT)所得到的頻譜(spectrum)資訊來獲得這些傳輸參數;在本論文中,我們提出另一種輸出響應分析方法,其能夠直接在時域上獲得雜訊與諧波失真所造成的平均功率,而去得到訊號與雜訊諧波比以及有效位元數。此輸出響應分析方法能夠減少為了實現快速傅立葉轉換與的窗函數(window function) 所需的高成本,並且能夠避免在量測上為了符合協調取樣(coherent sampling)所需要的複雜設定。

      In this thesis, a built-in self-test (BIST) methodology used to test the important transmission parameters, signal-to-noise-and-distortion ratio (SNDR) and effective number of bits (ENOB), of analog-to-digital converters (ADCs) is proposed. A band-pass sigma-delta modulator based signal generator is presented which can concurrently produce high frequency analog sinusoidal test stimuli and digital sinusoidal reference signals. Compared with pure analog signal generator, the amplitude and oscillation frequency of the generated signal can be precisely controlled. Unlike conventional test methods which compute these parameters based on the spectrum information after fast Fourier transformation (FFT), the proposed BIST methodology can directly determine the average power caused by noise and distortion in time domain. Afterwards, SNDR and ENOB can be obtained. It can reduce the high cost of implementing FFT and windowing functional blocks, and alleviate the difficulty in setting the test frequencies to conform to the condition of coherent sampling.

    Table of Contents i Acknowledgement iii Abstract iv Figure Captions vi Table Captions ix 1 Introduction 1 1.1 Motivation 1 1.2 Organization of the Thesis 4 2 Foundamentals and Basic Concepts 5 2.1 Background 5 2.1.1 Introduction of ADCs 6 2.1.2 Performance Metrics of ADCs 7 2.2 DSP-Based Testing 14 2.2.1 Coherent Sampling 15 2.2.2 Fast Fourier Transform 16 2.3 Fundamentals of Sigma-Delta Modulator 20 2.3.1 Quantization and Oversampling 20 2.3.2 Sigma-Delta Modulator 22 2.4 Low-Frequwncy Analog Signal Generator 25 2.4.1 Digital Resonator 26 2.4.2 Sigma-Delta Modulator Based Analog Signal Generator 29 3 The Concurrent High-Frequency Analog and Digital Signal Generator 31 3.1 Band-Pass Sigma-Delta Modulator 31 3.2 Band-Pass Sigma-Delta Modulator Based Signal Generator 33 3.2.1 Band-Pass Digital Resonator 33 3.2.2 Analog Signal Generator 37 3.2.3 Concurrent Digital Signal Generator 41 3.3 Simulation 47 4 Time Domain BIST Methodology 52 4.1 Statistical Characteristics of Noise 53 4.2 Representation of Signal 55 4.2.1 The Discrete-Time Fouier series 55 4.2.2 The Discrete-Time Fourier Transform 56 4.3 The BIST Methodology 58 4.3.1 Basic Concept of the BIST Methodology 58 4.3.2 Overall BIST Methodology 60 4.3.3 The Distribution of Mixed-Signal Measurements 66 4.4 Simulation 68 5 Conclusions and Future Work 74 5.1 Conclusions 74 5.2 Future Work 75 References 76

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