簡易檢索 / 詳目顯示

研究生: 曾俊憲
Zeng, Jun-Xian
論文名稱: 2.45GHz和5.8GHz微波退火對摻雜活化及等效氧化層厚度之研究
Studies on dopant activation and EOT control of HKMG stacks by 2.45GHz and 5.8GHz microwave annealing
指導教授: 李文熙
Lee, Wen-Shi
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2020
畢業學年度: 108
語文別: 英文
論文頁數: 55
中文關鍵詞: 微波退火摻雜活化金屬後退火等效氧化層厚度
外文關鍵詞: Microwave annealing(MWA), dopant activation, post equivalent oxide thickness(EOT)
相關次數: 點閱:89下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 隨著半導體元件尺寸的持續縮微,矽基板半導體元件因受限於其材料物理限制,難以滿足現今元件特性需求。研究新型高遷移率材料(矽鍺化合物、純鍺)及堆疊製程以突破摩爾定律限制及提升電性可謂當今研究的首要目標,而在元件製程的熱預算控制需求相對提升。有鑒於此,在本論文中,將針對不同材料(矽、矽鍺與純鍺)製程中摻雜活化及金屬後退火兩大熱處理製程以不同頻率的微波退火取代原本傳統快速熱退火,以材料對頻率吸收度差異來達到材料針對性退火,降低整體熱處理製程額外產生的熱預算。在微波退火技術中,將針對三種不同半導體材料採用2.45GHz及5.8GHz頻段做活化程度分析比較,並試圖找出頻率對材料的針對性,以達到針對材料退火降低製成的熱預算。另外,在金屬後退火製程中,HKMG會因為傳統的高溫摻雜活化導致EOT增加,使得元件性能下降,而我們將會以2.45GHz及5.8GHz頻段的低溫微波退火取代傳統熱退火方式,並分析其電性的改善。
    本論文中將分成三部分:第一部分,在矽、矽鍺、純鍺材料基板中離子佈值硼離子與熱退火,以不同頻率(2.45GHz 和5.8GHz)的微波退火和傳統快速熱退火進行參雜活化,經量測後結果發現使用5.8GHz頻率的微波退火中,矽有高活化程度,而純鍺和矽鍺薄膜中,利用2.45GHz微波退火做摻雜活化可以達到高活化程度,利用不同頻率,我們可以達到變頻對材料的針對性退火,以降低整體熱處理製程所產生的額外熱預算。
    第二部分,我們將對TiN/Al/TiN/HfO2/Si結構的電容進行退火,並針對等效氧化層的增加與鋁的擴散程度進行研究,在微波退火30秒下,電容有良好的電容值、低漏電流且鋁層幾乎沒有擴散至TiN及HfO2,但由於退火時間過少,在gate-first製程中,無法達到參雜活化的效果,因此我們將退火時間提升到100秒,可以發現到在5.8GHz微波退火中,因為較長的退火時間會導致在高能量下元件漏電明顯及閘極中鋁擴散至介電層導致閾值電壓偏移,而2.45GHz的微波退火,能有效避免上述現象發生。
    最後,我們將以gate-last製程方式製作p-MOSFETs。在gate-last製程中,我們將分為摻雜活化及金屬後退火修復的兩次退火,摻雜活化部分,將會以論文中第一部分分析出的高活化程度的微波退火參數進行退火活化,接著再疊完金屬閘極後,以第二部分分析出的參數進行金屬後修復對火,以達到最小的額外熱預算產生及提升電性。
    分析以上結果我們可以得到,在熱處理製程中,以不同頻率的微波退火可以達到針對材料活化的效果,而在金屬後退火中,以低頻率(2.45 GHz)微波退火可以有效的達到修復效果並抑制等校氧化層增加及鋁擴散。綜合上述兩點,元件製程中利用變頻微波的材料針對性退火,可以達到有效降低熱預算並提升元件特性之效果。

    In recent times, the feature size of logic devices is scaling down, traditional Si-devices will be limited by the physical limitations of materials. The high mobility and improved process would be used to enhance the device’s performance, in this paper, we will analyze the dopant activation level of different material annealed by 2.45GHz and 5.8GHz MWA and RTA, trying to find the material-targeted annealing method to reduce the thermal budget in the annealing process. In addition, in gate-first process, the high temperature of dopant activation will cause the EOT increasing, let a low performance. We will replace the traditional annealing to low-temperature microwave annealing with 2.45GHz and 5.8GHz to reduce EOT increasing and Al diffusion and we will fabricate the pMOSFETs with two different frequency MWA to reduce thermal budget caused in thermal process.
    There are three parts in this paper, in the first part, for the dopant activation, there are two different frequency(2.45GHz and 5.8GHz) microwave annealing methods were compared. As the results of electrical measurement, we can observe the high activation level in Ge content samples by 2.45GHz MWA and in Si samples by 5.8GHz MWA, that shows the material-targeted annealing method to reduce the thermal budget of device.
    In the second part, we will analysis the electrical characteristics of capacitors after dopant activation in gate-last process. And the results show the good EOT and suppress Al diffusion by 2.45GHz MWA in long annealing time.
    In the final part, we fabricated the pMOSFETs with two different frequency MWA for dopant activation and post metallization annealing. By the material-targeted annealing method, the thermal budget can be reducing and the device has high performance.

    中文摘要 I ABSTRACT III 致謝 V CONTENTS VII LIST OF FIGURES IX LIST OF TABLE XII Chapter 1 Introduction - 1 - 1.1 Background - 1 - 1.2 Research Motivation - 5 - 1.3 Overview - 7 - Chapter 2 Literature Review - 8 - 2.1 Microwave annealing technique(MWA) - 8 - 2.2 Ion implantation - 14 - 2.3 Solid Phase Epitaxial Regrowth - 14 - 2.4 5.8GHz Microwave annealing for MOSFETs with high-k/metal gate stacks - 16 - Chapter 3 Experiment Scheme - 18 - 3.1 Experimental Procedure - 18 - 3.2 Process Equipment - 23 - 3.2.1 Microwave annealing (MWA) - 23 - 3.2.2 Rapid thermal anneal (RTA) - 24 - Chapter 4 Results and Discussion - 26 - 4.1 Dopant activation level by MWA with different frequency - 26 - 4.2 Analysis of capacitor after different annealing process - 36 - 4.3 Post Metallization Annealing with different frequency MWA - 44 - Chapter 5 Conclusion and Future Work - 50 - 5.1 Conclusion - 50 - 5.2 Future Work - 50 - Reference - 52 -

    [1] J. Hur et al., "Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-Mode Versus Junctionless Mode," IEEE Electron Device Letters, vol. 37, no. 5, pp. 541-544, 2016, doi: 10.1109/led.2016.2540645.
    [2] L. Yao-Jen et al., "A Low-Temperature Microwave Anneal Process for Boron-Doped Ultrathin Ge Epilayer on Si Substrate," IEEE Electron Device Letters, vol. 30, no. 2, pp. 123-125, 2009, doi: 10.1109/led.2008.2009474.
    [3] N. Loubet et al., "Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET," in 2017 Symposium on VLSI Technology, 5-8 June 2017 2017, pp. T230-T231, doi: 10.23919/VLSIT.2017.7998183.
    [4] Z. Yun, C. Rivas, R. Lake, K. Alam, T. B. Boykin, and G. Klimeck, "Electronic properties of silicon nanowires," IEEE Transactions on Electron Devices, vol. 52, no. 6, pp. 1097-1103, 2005, doi: 10.1109/TED.2005.848077.
    [5] Y. Chia Ching et al., "Electron mobility enhancement using ultrathin pure Ge on Si substrate," IEEE Electron Device Letters, vol. 26, no. 10, pp. 761-763, 2005, doi: 10.1109/LED.2005.855420.
    [6] U. Konig and F. Schaffler, "p-type Ge-channel MODFETs with high transconductance grown on Si substrates," IEEE Electron Device Letters, vol. 14, no. 4, pp. 205-207, 1993, doi: 10.1109/55.215149.
    [7] Q. Zhang et al., "Drive-Current Enhancement in Ge n-Channel MOSFET Using Laser Annealing for Source/Drain Activation," IEEE Electron Device Letters, vol. 27, no. 9, pp. 728-730, 2006, doi: 10.1109/LED.2006.880655.
    [8] E. Rosseel et al., "Impact of sub-melt laser annealing on Si1-xGex source /drain defectivity," in 2007 15th International Conference on Advanced Thermal Processing of Semiconductors, 2-5 Oct. 2007 2007, pp. 307-315, doi: 10.1109/RTP.2007.4383859.
    [9] J. M. Kowalski, J. E. Kowalski, and B. Lojek, "Microwave Annealing for Low Temperature Activation of As in Si," in 2007 15th International Conference on Advanced Thermal Processing of Semiconductors, 2-5 Oct. 2007 2007, pp. 51-56, doi: 10.1109/RTP.2007.4383818.
    [10] C.-C. Cheng et al., "Junction and Device Characteristics of Gate-Last Ge p-and n-MOSFETs With ALD-$hbox {Al} _ {2}hbox {O} _ {3} $ Gate Dielectric," IEEE transactions on electron devices, vol. 56, no. 8, pp. 1681-1689, 2009.
    [11] C. O. Chui, K. Gopalakrishnan, P. B. Griffin, J. D. Plummer, and K. C. Saraswat, "Activation and diffusion studies of ion-implanted p and n dopants in germanium," Applied physics letters, vol. 83, no. 16, pp. 3275-3277, 2003.
    [12] Y. S. Suh et al., "Implantation and activation of high concentrations of boron in germanium," IEEE transactions on electron devices, vol. 52, no. 11, pp. 2416-2421, 2005.
    [13] C. O. Chui, H. Kim, D. Chi, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "A sub-400/spl deg/C germanium MOSFET technology with high-/spl kappa/dielectric and metal gate," in Digest. International Electron Devices Meeting, 2002: IEEE, pp. 437-440.
    [14] H. Wong, J. Zhang, S. Dong, K. Kakushima, and H. Iwai, "Thermal annealing, interface reaction, and lanthanum-based sub-nanometer EOT gate dielectrics," Vacuum, vol. 118, pp. 2-7, 2015.
    [15] J. Zhang, H. Wong, K. Kakushima, and H. Iwai, "XPS study on the effects of thermal annealing on CeO2/La2O3 stacked gate dielectrics," Thin Solid Films, vol. 600, pp. 30-35, 2016.
    [16] J. Zhang et al., "Modulation of charge trapping and current-conduction mechanism of TiO2-doped HfO2 gate dielectrics based MOS capacitors by annealing temperature," Journal of Alloys and Compounds, vol. 647, pp. 1054-1060, 2015.
    [17] J. Gao, G. He, J. Zhang, B. Deng, and Y. Liu, "Annealing temperature modulated interfacial chemistry and electrical characteristics of sputtering-derived HfO2/Si gate stack," Journal of Alloys and Compounds, vol. 647, pp. 322-330, 2015.
    [18] M. Yun et al., "Effects of post-metallization annealing of high-K dielectric thin films grown by MOMBE," Microelectronic engineering, vol. 77, no. 1, pp. 48-54, 2005.
    [19] M.-H. Cho et al., "Thermal stability and structural characteristics of HfO 2 films on Si (100) grown by atomic-layer deposition," Applied physics letters, vol. 81, no. 3, pp. 472-474, 2002.
    [20] M. Bosman et al., "The distribution of chemical elements in Al-or La-capped high-κ metal gate stacks," Applied Physics Letters, vol. 97, no. 10, p. 103504, 2010.
    [21] E. Thostenson and T.-W. Chou, "Microwave processing: fundamentals and applications," Composites Part A: Applied Science and Manufacturing, vol. 30, no. 9, pp. 1055-1071, 1999.
    [22] A. Metaxas, "Foundations of electroheat. A unified approach," in Fuel and Energy Abstracts, 1996, vol. 3, no. 37, p. 193.
    [23] D. Stuerga, "Microwave-material interactions and dielectric properties, key ingredients for mastery of chemical microwave processes," Microwaves in organic synthesis, vol. 2, pp. 1-59, 2006.
    [24] B. K. P. Scaife, "Principles of dielectrics," 1989.
    [25] G. Raju, "Polarization and static dielectric constant," Dielectrics Electric Fields, 2003.
    [26] P. Lidström, J. Tierney, B. Watheyb, and J. Westmana, "Microwave assisted organic synthesisÐa review," Tetrahedron, vol. 57, pp. 9225-9283, 2001.
    [27] G. Dearnaley, F. JH, and N. RS, "Ion Implantation," 1973.
    [28] L. Csepregi, J. Mayer, and T. Sigmon, "Chaneling effect measurements of the recrystallization of amorphous Si layers on crystal Si," Physics Letters A, vol. 54, no. 2, pp. 157-158, 1975.
    [29] J. S. Williams and J. M. Poate, Ion implantation and beam processing. Academic Press, 2014.
    [30] J. Ziegler, "High energy ion implantation," Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, vol. 6, no. 1-2, pp. 270-282, 1985.
    [31] D. Auston, C. Surko, T. Venkatesan, R. Slusher, and J. A. Golovchenko, "Time‐resolved reflectivity of ion‐implanted silicon during laser annealing," Applied Physics Letters, vol. 33, no. 5, pp. 437-440, 1978.
    [32] J. Linnros, B. Svensson, and G. Holmen, "Ion-beam-induced epitaxial regrowth of amorphous layers in silicon on sapphire," Physical Review B, vol. 30, no. 7, p. 3629, 1984.
    [33] L. Pelaz, L. A. Marqués, and J. Barbolla, "Ion-beam-induced amorphization and recrystallization in silicon," Journal of applied physics, vol. 96, no. 11, pp. 5947-5976, 2004.
    [34] R. Elliman, J. Williams, W. Brown, A. Leiberich, D. Maher, and R. Knoell, "Ion-beam-induced crystallization and amorphization of silicon," Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, vol. 19, pp. 435-442, 1987.
    [35] G. Olson, "Kinetics and Mechanisms of Solid Phase Epitaxy and Competitive Processes in Silicon," MRS Online Proceedings Library Archive, vol. 35, 1984.
    [36] Y.-J. Lee et al., "Low-temperature microwave annealing for MOSFETs with high-k/metal gate stacks," IEEE electron device letters, vol. 34, no. 10, pp. 1286-1288, 2013.
    [37] V. Cosnier et al., "Understanding of the thermal stability of the hafnium oxide/TiN stack via 2 “high k” and 2 metal deposition techniques," Microelectronic engineering, vol. 84, no. 9-10, pp. 1886-1889, 2007.
    [38] M. Kadoshima et al., "Effective-work-function control by varying the TiN thickness in Poly-Si/TiN gate electrodes for scaled high-$ k $ CMOSFETs," IEEE Electron Device Letters, vol. 30, no. 5, pp. 466-468, 2009.
    [39] K. Tai et al., "High performance pMOSFET with ALD-TiN/HfO2 gate stack on (110) substrate by low temperature process," in 2006 European Solid-State Device Research Conference, 2006: IEEE, pp. 121-124.
    [40] A. Veloso et al., "Gate-last vs. gate-first technology for aggressively scaled EOT logic/RF CMOS," in 2011 Symposium on VLSI Technology-Digest of Technical Papers, 2011: IEEE, pp. 34-35.
    [41] H. B. Michaelson, "The work function of the elements and its periodicity," Journal of applied physics, vol. 48, no. 11, pp. 4729-4733, 1977.
    [42] F. Panciera, S. Baudot, K. Hoummada, M. Gregoire, M. Juhel, and D. Mangelinck, "Three-dimensional distribution of Al in high-k metal gate: Impact on transistor voltage threshold," Applied Physics Letters, vol. 100, no. 20, p. 201909, 2012.
    [43] B. Saidi, "Metal gate work function modulation mechanisms for 20-14 nm CMOS low thermal budget integration," 2014.
    [44] T.-L. Shih, Y.-H. Su, T.-C. Kuo, W.-H. Lee, and M. I. Current, "Effect of microwave annealing on electrical characteristics of TiN/Al/TiN/HfO2/Si MOS capacitors," Applied Physics Letters, vol. 111, no. 1, p. 012101, 2017.
    [45] W. Windl, M. Bunea, R. Stumpf, S. Dunham, and M. Masquelier, "First-principles study of boron diffusion in silicon," Physical review letters, vol. 83, no. 21, p. 4345, 1999.
    [46] T.-C. Kuo, K.-J. Jhong, C.-W. Lin, and W.-H. Lee, "Effect of annealing conditions on dopants activation and stress conservation in silicon-germanium," AIP Advances, vol. 9, no. 1, p. 015110, 2019.

    無法下載圖示 校內:2025-07-26公開
    校外:不公開
    電子論文尚未授權公開,紙本請查館藏目錄
    QR CODE